Smart Handling with Surge Current in PFC Using A Silicon Carbide Schottky DiodeApril 13, 2018 by Damijan Zupancic
This article highlights Infineon CoolSiC™ G6 diode as the new sixth generation of SiC Schottky diodes that reduced conduction losses and surge parameters.
The Silicon Carbide diodes are widely used in different applications aiming for high efficiency and power density. The optimization process behind CoolSiC™ G6, the new sixth generation of Silicon Carbide Schottky diodes reduced conduction losses, but at the same time caused the lowering of the surge current parameters in certain areas. However, the resulting performance of the CoolSiC G6 fulfills application requirements well.
With the adoption of SiC Schottky diodes in PFC topologies, a bypass diode has been used in order to restrict the forward current through the SiC diode in case a surge current affects the mains of the power supply. Figure 1 illustrates how the bypass diode is usually implemented in a classic PFC. The bypass diode conducts only when the rectified voltage is higher than the output voltage (e.g. surge events).
The first test had the original setup of the 800W PFC evaluation board1 and it was performed with the bypass diode implemented. In order to show the worst possible surge current conditions, the following test setup was selected:
Input voltage: Vin = 90V AC
Switching frequency: fsw = 130kHz
Output power: Pout = 800W
Surge pulse: Vsurge = 4kV, Z = 2 Ω, φ = 90°, L-N configuration
Surge Immunity Test
The surge immunity test was carried out at 90° (i.e. positive voltage pulse added on top of the sine wave). Specifically, a combination wave test using an impulse voltage wave of 1.2/50 μs with a 4 kV peak value was selected. The test is defined by the standard IEC 61000-4-5, which applies to telecom requirements.
This study includes the worst possible conditions in the PFC circuit with respect to surge immunity. When the lowest input voltage is applied, the highest current enters the circuit. At this operation point, the highest current flows through the PFC choke and saturating it. This saturation leads to a reduction of the inductance and a decrease in the choke features. The saturated choke cannot contribute much to this link.
Limiting the Surge Current Pulse
Limiting the surge current pulse when the surge happens. This leads to higher stress on the boost diode, while more surge current is routed through it instead of being routed via the bypass diode. In this precise scenario, the boost diode experiences the highest stress (the highest current flows via the boost diode).
The first screenshot of current waveforms was captured on the boost diode (IDH06G65C6) and bypass diode (S5K) in order to show the current split between these two diodes during the surge event. The waveforms were captured, when the surge pulse was applied to the power supply input (800 W PFC). Both diodes were conducting simultaneously approximately 80μs at peak current values:
• Boost diode (IDH06G65C6): IF,max = 23.4A,
• Bypass diode (S5K): IF,max = 308A.
Current waveforms were captured also input voltage, which was rapidly increased at the surge pulse. The tested board has MOV (metal oxide varistor), which clamps high voltage during the surge event. The MOV impacts on the current flow through the bypass diode as well as the boost diode.It was applied a differential mode surge pulse, which caused a special behavior on the current flow through bypass diode.
Two Current Pulses After the Surge Event
There were two current pulses after the surge event. The first pulse came at the point when the surge pulse was applied. The second pulse was a secondary effect of the MOV clamping. When the MOV was clamping, the rectified voltage was decreased and the bypass diode stopped conducting. When MOV released, the voltage on the input increased and the second pulse through bypass diode was injected.
The current through the boost diode was smooth since the PFC choke was limiting fast transients. In operation conditions, the boost diode (the Silicon Carbide diode) did not see any additional stress. The current through the diode was within the specification. The second scenario considered the surge immunity test without the bypass diode in the circuit.
Features of Bypass Diode were Disabled
The bypass diode was de-soldered from the 800 W PFC board. That means all features of bypass diode were disabled. In order to have the same test conditions as in the previous scenario were applied the same input voltage, output load, and the surge current.
When surge pulse passed the circuit, the current through the boost diode increased to 24 A. This current value is still within the specification of the surge current given in the datasheet. The boost diode (CoolSiC G6) passed the test, but the bridge rectifier (LVB2560) failed due to the too high voltage stress.
The CoolSiC G6 diode is not limiting the surge immunity of the PFC stage, even if no bypass diode is used. The comparison between designs with and without bypass indicates the clear benefit of the bypass diode. It fully protects the PFC circuit against high surge current and does not generate any additional power losses under steady-state conditions because it conducts only when the voltage on the anode is higher than on the cathode. Therefore, it is a safety component which conducts only rarely, under conditions such as surge current.