Technical Article

Driving and Protecting 1200VClass IGBTs with HVICs

November 01, 2015 by Marco Honsberg

This article introduces Mitsubishi Electric's 1200V/2A HVIC, the M81748FP, with high-side and low-side short circuit (SC) protection circuit.

1200V class IGBTs used in small (industrial) motor control applications are more and more driven by 1200V High Voltage Integrated Circuits (HVICs). This approach provides defined low propagation times of signal transfer from control input to driver output and avoids the optocoupler typical aging effects of this essential part of the power stage.

 

The utilization of HVIC’s is rather common for 1200V IGBTs having rated Collector currents of usually not more than 50A to 75A especially in Intelligent Power Modules (IPMs) while above that current level still optocoupler based driver stages are put in place. This article presents a novel 1200V High Voltage Integrated Circuit the M81748FP for half bridge driver applications with complete high- and low-side fault protection circuitry that is designed to drive IGBT power modules of up to 150A (200A) of rated current. Apparently, a simple increase in the output driver stage is not enough to ensure safe operation, especially in a short circuit situation. The introduced HVIC (M81748FP) along with its evaluation platform for six-pack (6in1) IGBT modules are used to prove the robustness at switching operation even beyond the IGBT’s specified maximum limits without latch-up.

 

A Brief History of 1200V HVICs

Previous generations of highly dV/dt and Vs undershoot immune 1200V HVICs have facilitated low-side fault protection through a shunt resistor connected to the Emitter side. The first version, M81019FP, was developed in 2005 and a further improved version, M81738FP, was released in 2012.

The novel 1200V HVIC (M81748FP) was developed with both a low-side and a high-side fault protection based on a desaturation detection circuitry for IGBTs at a short circuit (SC) condition. The absence of shunt resistors on the high-side part of a 2in1 or 6in1 IGBT module and the fact that the applicable current range of modules shall be increased to a range where shunt resistors become inefficient has stipulated a change of the SC detection method.

Integrating a desaturation detection circuitry for low-side and high-side will facilitate to even SC protect 6in1 (6-pack) modules leg by leg. Hence, the added high-side fault protection function provides high-reliability operation and efficient protection even at earth fault conditions.

The core technology realizing this feature of high-side SC protection on the HVIC is the implementation of an electrically floating High-side island having a high voltage level-shifting structure transmitting a signal between high voltage region (High-side) and the low voltage region (Low-side).

A forward level shifting function transmitting signals from low-side to high-side, which is indispensable for the high side gate drive has been implemented utilizing a divided RESURF structure that will be explained later. The structure on the chip is based on a level shifter composed of a high voltage Nch-MOS and a dedicated filter on the receiving high voltage floating part of the HVIC. For the required information flow from this HV floating island back to the control interface potential the new function of transferring logic signals from the High-side floating island down to N (GND) potential is realized by a reverse level shifter structure composed of a high voltage Pch-MOS〔2〕along with a corresponding reception circuitry on N (GND) potential.

 

Forward and Reverse Level Shifting HVICs

Figure 1 shows a block diagram of the HVIC. The “HIN” input signal is transferred to the output “HO” by a level shifter and the HDESAT fault signal is transferred to the “FO” by the previously introduced reverse level shifter.

 

M81748FP block diagram

Figure 1. M81748FP block diagram

 

The new HVIC detects at its terminals “HDESAT” and at the terminal “LDESAT” for the L-side respectively a desaturation of the connected IGBT. Those terminals are linked to the internal fault logic and control the output terminals HO / LO as well as they act on the Fault Output (FO).

Figure 2 shows an application circuit of M81748FP for IGBTs.

 

M81748FP application circuit

Figure 2. M81748FP application circuit

 

In this proposed application circuit the high voltage diodes with low reverse-recovery charge and corresponding low reverse recovery time are connected between the “DESAT” terminals (Anode of the diode) and the IGBT’s collector terminals. Additional spike filtering blanking capacitors are connected between the “DESAT” terminals and VS or GND terminals respectively to provide noise immunity.

In detail the circuit operates as follows:

When the High-side-IGBT is turned on, the current provided from the corresponding DESAT terminal flows through the Collector-Emitter path to the reference potential. The voltage level at the DESAT input can be considered low. However, at a short circuit situation, the IGBT is considered desaturated and, hence, the current originating from the “DESAT” terminal flows into to the blanking capacitor since the Collector-Emitter path is blocked by the implemented diode. Once the voltage at the DESAT terminal exceeds the internal threshold voltage of the HVIC, a desaturation situation is detected which immediately initiates a soft shut down procedure inside the M81748FP. Thus, the output driver stages for low side “LO” and High-side “HO” correspondingly are shut down softly. The indication of this abnormal desaturated situation is realized by the fault output terminal “FO” becoming low and providing the information to the superimposed control system.

  

Short Circuit and Undershoot Voltage Generation

A typical schematic diagram of a half bridge application circuit with indicated parasitic elements reveals that during switching operation, e.g., when the P-side transistor Q1 is turning-off, the inductive load causes the current (IFW) to keep on flowing. Therefore, because the current (IFW) flows through the parasitic inductance L3-L4 and the FWDi of Q2, transient Vs minus undershoot peak will occur at the Vs node. This dynamic negative “undershoot” peak voltage may lead to two problems: At insufficient robustness of the HVIC design the HVIC could be worst case destroyed or at least - being not immediately destructive to the HVIC - a false or no signal could be transferred to the HO output.

 

Typical connection diagram of a half bridge application circuit

Figure 3. Typical connection diagram of a half bridge application circuit

 

The M81748FP indeed provides a high immunity to such VS undershoot voltage. A test has been carried out with a sixpack “6in1” 100A /1200V class IGBT module “CM100TX-24S1” with 0 Ohm of gate resistor while the voltage at terminal “VS” was recorded. Although the voltage during this transiently reached a level of as low as -129V, no destruction or malfunction of this tested M81748FP device could be observed.

 

Waveforms of IGBT module during turn-off (conditions: CM100TX-24S1, Ta=25°C, VS=900V, Rg=10ohm, VGE=15V)

Figure 4. Waveforms of IGBT module during turn-off (conditions: CM100TX-24S1, Ta=25°C, VS=900V, Rg=10ohm, VGE=15V)

 

M81748FP HVIC Evaluation board

Mitsubishi Electric provides an evaluation board to test the performance and robustness of this M81748FP in conjunction with 6in1 IGBT modules. The developed board carries 3 pieces of the described M81748FP 1200V HVICs along with the required peripheral circuitry to drive 100A…150A class 1200V 6in1 IGBT modules (CM100TX-24S1 or CM150TX-24S1). Figure 5 shows the evaluation board layout.

 

Evaluation board layout for M81748FP (top)

Evaluation board layout for M81748FP

Figure 5. Evaluation board layout for M81748FP

 

Conclusion

A 1200V/2A HVIC (M81748FP) with high-side and low-side short circuit (SC) protection circuit has been introduced. The newly integrated reverse level shifter circuit provides an upgrade of the functionality of HVICs. The robustness of the HVIC technology has been proven even beyond the specification limits of the utilized IGBT modules.

 

About the Authors

Marco Honsber works as the Business Developer at Mitsubishi Electric Europe B.V. where he is responsible for market investigation and intelligence, competition analysis, portfolio analysis for active road mapping, development of promotion strategies and tools as well as constant development and realization of new business ideas and business plan for development of strategic cooperations. He earned his Engineering Diploma in Electrical Energy Systems, Machines and Drives at the University of Wuppertal (Bergische Universität Wuppertal). He also holds an MBA at FOM University of Economics and Management.

Yo Habu works at Mitsubishi Electric Corporation, Fukuoka Japan, a branch of the Japanese multinational electronics and electrical equipment company, Mitsubishi Electric Corporation, that specializes in power device works.

 

References

  1. M.Yamamoto et al.: “High reliability 1200V High Voltage Integrated Circuit (1200V HVIC) for half bridge applications“, Proc. of PCIM, 2012, pp.466-472.
  2. M.Yoshino et al.: “A novel high voltage Pch-MOS with a new drain drift structure for 1200V HVICs“, Proc. ISPSD, 2013, pp.77-80.
  3. M. Honsberg et al.: ”A Novel Family of 1200V Transfer Mold Converter - Inverter - Brake (CIB) Modules Driven by a New 1200V High Voltage Integrated Circuit (1200V HVIC)”, Proc. of PCIM 2005, pp. 461-468
  4. K.Shimizu and T.Terashima, ”The 2nd Generation divided RESURF structure for High Voltage ICs”, Proc. ISPSD, 2008,pp.311-314.
  5. T.Terashima, K.Shimizu and S.Hine: “A new Level-shifting Technique by divided RESURF structure“, Proc. ISPSD, 1997, pp.57-60.