Design Automation Conference: An Important Update for the Electronics IndustryAugust 06, 2019 by Henning Wriedt
This article highlights Bodo’s Power Systems US-Correspondent this year 56th Design Automation Conference (DAC) plus Exhibition took place in Las Vegas.
An important update for the electronics industry This year the 56th Design Automation Conference (DAC) plus Exhibition took place in early June in Las Vegas, USA. DAC covers an important part of the world-wide electronics industry.
Founded in 1964, DAC is one of the longest running conferences especially tailored to the design and automation of electronic circuits and systems. And, according to Technical Program Chair Harry Foster (Mentor), an industry authority and sought-after expert on formal verification, 2019 was a record year in terms of research paper submissions and accepted papers: 815 papers were submitted, and 202 accepted (35% EDA; 32% Design; 17% Embedded Systems and 16% Security/Safety/ Autonomous Systems). Just these numbers are a clear sign, that the DAC is still going strong.
Foster: „Yet, DAC has evolved over the years to address emerging challenges - beginning with its roots in traditional electronic design automation (EDA) and in recent years expanding into a broad spectrum of research topics associated with chip and system design. About two thirds of this year’s papers focus on many other important aspects of design, such as the design of autonomous systems, security, embedded systems, artificial intelligent architectures, and cyber-physical systems.”
“The conference was organized in 44 technical sessions conducted in five daily parallel tracks. A few highlights from this year’s conference included22 papers on machine-learning and artificial-intelligent architectures. For example “Emerging Technologies Meet Intelligent Machines”, highlighted recent advances in emerging device technologies for hardware implementation of neural networks.”
Of course, the more than 40 technical sessions covered almost every aspect of the electronic design automation business, but there were also presentations, which gave the audience an interesting look towards upcoming developments not only in the EDA-world. Here are just a few examples:
- Future AI Trends for IP within the automotive industry
- Designing efficient and safe autonomy
- Faster compute in smarter industries
- Design-Time optimization of Power, Temperature, and Accuracy
- IP to secure devices in a hostile world
- Hide and seek: Encryption and Obfuscation
The complete proceedings of this conference can be searched in the digital libraries of the ACM and the IEEE. Just a reminder: The subtitle of the DAC conference is: From Chip to Systems - Learn today, create tomorrow!
Especially the keynotes drew always a big crowd. Galen C. Hunt, Managing Director of Microsoft, presented his thoughts about: „Securing the billions of devices around us". He pointed to the fact, that those billions of devices are controlled by microcontrollers, which in his opinion are ill-prepared for the security challenges of Internet connectivity.
To overcome this situation, Hunt refers to Microsoft‘s „Azur Sphere“, which brings together the company’s expertise in cloud, software, and device technology to provide a unique approach to security that starts in the silicon and extends to the cloud.
A custom Linux kernel enables silicon diversity and innovation. The new crossover class of MCUs now combines both real-time and application processors with built-in Microsoft security technology and connectivity.
Center for Brains, Minds and Machines (CBMM) MIT
Reverse Engineering visual Intelligence
Dr. James DiCarlo from the Massachusetts Institute of Technology explained an impressed audience his thoughts about „Reverse Engineering visual Intelligence“. Here is a summary in his own words:„
The brain and cognitive sciences are hard at work on a great scientific quest - to reverse engineer the human mind and its intelligent behavior. These fields are still in their infancy. Not surprisingly, forward engineering approaches that aim to emulate human intelligence in artificial systems are also still in their infancy.
Yet the intelligence and cognitive flexibility evidenced in human behavior are an existence proof that machines can be constructed to emulate and work alongside the human mind.
I believe that the challenges of reverse engineering human intelligence will be solved by guiding forward engineering aimed at emulating intelligent behavior with knowledge and data from brain and cognitive sciences. To demonstrate this, I focus on one aspect of human intelligence - visual object categorization and detection - and I will explain the story of how work in brain science, cognitive science and computer science converged to create deep neural networks that can support such abilities.
These networks not only reach human performance for many images, but their internal workings are modeled after- and largely explain and predict - the internal neural processing of the primate visual system.
As this approach discovers the correct neural network models, those models will not only advance engineered systems - they will be the basis of novel brain interfaces for therapeutic and augmentation goals. To make that point, I can show that the knowledge embedded in the current best neural network models of the primate visual system already enables unprecedented precision in non-invasive control of neural population states deep in the brain.
This is only the first wave of advances in artificial systems. For example, the primate visual system still outperforms current generation artificial deep neural networks, and I can show some recent clues that the brain and cognitive sciences can offer to help advance the next wave. More broadly, our species is the beginning of its most important science quest - the quest to understand human intelligence- and I hope to motivate engineers and other scientists to engage that frontier alongside us.”
Design Automation Conference (DAC)
DAC and Semicon co-locate
Just these two keynote examples show clearly, that the DAC should be worth a visit for every electronic engineer. No wonder, that SEMI and the Design Automation Conference announced during the conference, that DAC and SEMICON West will co-locate in July, 2020 and July, 2021. „
The co-location represents a game-changing combination of world-class technical programs and exhibitions designed to give engineering attendees a central event to network, attend technical sessions and get exposed to the latest vendor technologies from the entire design and manufacturing ecosystem“ so the official announcement.
Several design topics were covered in the Research Track, including the design of cyber-physical and Internet-of-Things (IoT) systems, SoC architectures, accelerator-based computing, emerging models of computation such as brain-inspired and quantum computing, digital and analog circuits, and emerging device technologies.
So for instance, Ahmad-Reza Sadeghi, Technische Universität Darmstadt, Germany, moderated the topic “ Secure Open-Source Hardware: Hype or Reality?” Key findings were: Hardware security plays a key role which has led to huge research and development efforts on designing and deploying hardware security architectures incorporating increasing number of security mechanisms.
As a result, the Trusted Computing Base in hardware is not only constantly growing but is also typically highly proprietary through strict IP protection. Consequently, hardware platforms contain design and implementation flaws that are discovered after the fact and exploited by adversaries, as it has been repeatedly and impressively demonstrated in the recent years. It seems questionable that semiconductor industry would ever be willing to adopt the necessary solutions and open-source their entire hardware designs in the future.
A second very interesting topic was “Resilience Revisited – Towards a System Perspective” moderated by Muhammad Shafique, Technische Universität, Vienna, Austria. Facing the upcoming age of autonomous driving, drone deliveries and Industry 4.0 automation, powerful computing platforms are increasingly deployed in safety-critical applications.
The underlying complex electronics suffer from random hardware faults such as radiation-induced soft errors, which may cause a corruption of data or program execution. Therefore, safety standards such as the ISO 26262 are introduced, which demand that the overall system must remain in a safe state even in the presence of such random faults.
ESS & Autonomous Systems
The Embedded Systems and Software sessions and the Autonomous Systems sessions at DAC provided a forum for discussing the challenges of embedded design and an opportunity to exchange ideas and roadmaps for the future for this rapidly expanding area Many visitors of the DAC-Show attended the session “Co-designing Hardware and Software for Secure Next Generation Platforms” because next generation platforms are expected to be intelligent and processing or communicating critical information.
Hardware and software vulnerabilities in these platforms can be exploited to leak critical information or even to invoke denial of service attacks resulting in catastrophic consequences. Hardware and software security experts discussed different ways to detect and prevent attacks on next generation platforms.
DAC Product Highlights
Single and dual Output Power Supplies
Keysight Technologies presented a new series (E36200/300) of single and dual output power supplies that delivers more usable power, bench friendly design with low background noise, small footprint and large display. Customers can integrate the E36200 into existing system using the rear output terminals, modern I/O and trigger port. The trigger port allows synchronization of other instruments and the ability to add an emergency shutdown control. The E36200 series show standard commands for programmable instrument (SCPI) power supplies with built-in USB, LAN, and optional GPIB.
EDA software scalability on the MS Azure
Mentor, a Siemens business, announced that the Calibre™ platform Physical Verification Suite has achieved a new standard for EDA software scalability on the Microsoft Azure cloud platform. The benchmarks were achieved during scaling experiments on 5 nm test chips and a full reticle-sized 7 nm production design on Azure. In these deployments, Calibre scaled out to more than 4,000 CPUs - an industry record for an EDA tool scaling a single job on Azure.
A case study worth sharing: Toshiba offers a variety of brush/brushless motor drivers that follow the Automotive Electronics Council (AEC-Q100) qualification to meet the device specifications suitable for use in harsh automotive environments. High output current ICs usually generate a lot of heat from the driver transistor which affects the surrounding circuits. For the motor driver IC, the current must be set up accurately for the driver.
This motor control driver includes an on-chip DMOS device with a current control circuit that operates as a regulator for the output current of the DMOS transistor. The DMOS transistor’s high temperature affects the circuit behavior and functionality. It is typically difficult to design the circuit and to optimize all device parameters without proper verification of the temperature change when the DMOS transistor is turned on and off.
The Eldo® circuit simulator supports fully-coupled electrothermal simulations. In high voltage/power applications, controlling the temperature and its propagation throughout the circuit and the system is critical. Using a global uniform temperature for the entire IC is no longer accurate enough. Eldo solves this problem by allowing the local temperature of devices or entire cells (SPICE subcircuits and Verilog-A models) to be true variables in the system. Temperatures are solved simultaneously with the voltages and the currents through the devices. This is called true electrothermal simulation.
Simulation requirements for PMICs
According to Karthik Srinivasan, Sr. Product Manager (Analog Mixed Signal, Ansys, Inc.), today’s PMICs contain one or multiple linear and switching regulators supplying power to different SoCs on an electronic subsystem. Since they operate at higher voltages supplying larger current demand of SoCs, they are typically fabricated in planar or specialized process technologies like BCD.
The key for efficient power management design is low quiescent current and faster response. For faster response the switching regulators are switching at higher frequencies which also means they can use smaller off-chip inductors which offers a better form factor.
On top of scaling of technology and frequency, Power FETs are going from discrete single FETs to complex multifunctional PMICs supplying several voltage levels and current loads. PMICs are also running complex algorithms performing battery management, and power sequencing. So, what used to be a discrete bulky power FET is getting condensed into a Power Management Chip.
The ANSYS Totem platform offers a comprehensive suite of tools that can aid designers to optimize the designs for power loss, thermal impact, noise coupling and EMI. It has a built-in extraction with user controllable and auto meshing for handling complex geometries on chip and package layers. It also has a built-in simulation and electromigration engine to understand the current crowding issues in the layout.
Intels Enpirion Power Solutions are high frequency, high efficiency power management devices for FPGAs, SoCs, CPUs, ASICs, and other semiconductor devices. These robust products meet stringent power requirements in a small footprint. The PowerSoC modules integrate nearly all the components needed to build a power supply without sacrificing performance or efficiency. The EN29A0QI 10A PowerSoC DC-DC step-down power converter is designed to power supply rails requiring very low ripple, low EMI, and tight DC and AC accuracy. The device is optimized specifically to meet the requirements for Intel FPGA and SoC transceivers, as well as transceivers for other FPGA and ASIC devices.
Dynamic Power Device Analyzer with Double-Pulse Test CapabilityA dynamic power device analyzer from Keysight Technologies with double-pulse tester (PD1500A) to deliver reliable, repeatable measurements of wide-bandgap (WBG) semiconductors, while ensuring the safety of the measurement hardware and the professionals performing the tests. Fully characterizing a SiC or GaN device requires static and dynamic measurements. The B1505A and B1506A Power Device Analyzers deliver these static measurements and, with the addition of the new PD1500A, now also provides the flexibility needed to address a variety of dynamic measurements.
GaN-ICs for monolithic IntegrationWith a higher breakdown strength, faster switching speed, higher thermal conductivity and lower ON-resistance, power devices based on GaN significantly outperform Si-based power chips. The first-generation GaN-based power devices will play a key role in the power conversion of various applications. Today, GaN is grown on a variety of substrates, including sapphire, silicon carbide (SiC) and silicon (Si).
Imec (Figure 1) takes today gallium nitride on silicon (GaN-on-Si) e-mode and diode technology to a higher level of maturity and explores the next generation GaN technology with higher level of integration (GaN-IC) and higher performances.Imec has been pioneering GaN technology for more than 15 years, evolving 200mm/8-inch wafers to realize GaN-on-Si devices at lower costs while maintaining world-class performance. The imec research covers GaN epitaxy as well as device engineering and processing technology.
Figure 1: imec‘s GaN Technology
Imec’s engagement offerings are the GaN Industrial Affiliation program, the GaN technology transfer, and the GaN private Lot. That means, that customers can design their device into imec’s state of the art 200mm GaN-on-Si technology platform for 200V and 650V (e-mode) power devices. Imec delivers prototype wafers to its customers, can tune the process according to the needs, and eventually sustain low-volume production.
Analysis Tool to PathWave Advanced Design System Solution
Keysight Technologies announced the Power Electronics Professional (PEPro) software, a new add-on to PathWave Advanced Design System (ADS) that enables designers to visualize effects of switched-mode power supply (SMPS) designs without the need to build and test time-consuming prototypes. Demand for SMPS is driven by the need for greater efficiency, increased power density and lower cost. New semiconducting materials such as SiC and GaN will power future applications due to their high performance and efficiency. However, high performance materials result in new challenges, as the layout of a PCB becomes more difficult. Post-layout analysis of a „virtual prototype“ is ideal for managing this challenge, but until now it required expertise with a complicated, general-purpose EM field solver. The PEPro software makes post-layout analysis as easy as pre-layout analysis. It includes automatic setup that previously required an expert. In addition, it offers pre-built analysis of effects such as voltage spiking and EMI.
Design Automation Conference (DAC)
Fundamental Shifts in the Electronic Ecosystem
As soon as Walden C. Rhines (CEO Emeritus of Mentor, a Siemens business) started his presentation, the crowd stopped talking and concentrated on Rhines' illustrated numbers about the current situation of the world-wide electronics industry. Rhines belongs to the very few of this industry, who are truly qualified to comment on such broad issues. Your reporter found a videotape of his (live) presentation this is link.
About the Author
Henning Wriedt works as US-Correspondent for Bodos Power Systems magazine that both delivered in print and online formats. With company strength and global understanding of the power electronics market, Bodos Power Systems publication focused exclusively on the technical needs of power electronics engineers. Also, Bodos Power Systems provides the global engineering community with detailed technology, applications, products, and news.
This article originally appeared in the Bodo’s Power Systems magazine.