Dry Film Capacitors for HighFrequency Power ElectronicsMarch 16, 2017 by Joseph Bond
This article discusses the requirements for power capacitors in systems seeking advantage in state-of-the-art high-frequency designs.
Dry plastic-dielectric (film) capacitors provide high-reliability and low-loss characteristics suitable for power electronics applications. These capacitors feature a tight capacitance shift versus temperature and frequency, lightweight, no oil or electrolyte, and flexible packaging options. They are efficient and cost-effective, and metalized film capacitors offer self-healing leading to soft failure modes over a long service life. Film capacitors are particularly well suited to high power applications in low to medium voltage markets.
Applications in power electronics include voltage transient snubbing, coupling and decoupling, DC links, feed-through, EMI line filters, and inverter AC output filters. The industry is continually evolving to increase energy density, reliability, and efficiency while decreasing size, weight, and cost. The days of throwing bulk capacitance at applications as an afterthought of the design are long gone. Film capacitor designers use a toolbox of materials and techniques to optimize the capacitor performance characteristics for a given application. Capacitor designers must develop innovative materials, construction technologies, and packaging methods complementing the state-of-the-art in power circuits.
This technical article deals with the necessary requirements for power capacitors in systems pursuing a benefit in advanced high frequency designs. Comparison of system design versus capacitor design approaches highlight the advantages of each approach mentioned. ECI power capacitors are developed particularly to comply with the challenges of increasing switching and harmonic filtering.
Wide Bandgap (WBG)
Wide bandgap (WBG) materials for power electronic semiconductors increase switching, harmonic, and EMI frequencies. Capacitors used in high-frequency applications must meet the increased performance requirements relative to the increased bandwidth of frequencies. Higher frequencies have a positive influence on reducing the capacitance needed for hold-up energy in filtering applications; however, the capacitors require lower Equivalent Series Inductance (ESL) and Equivalent Series Resistance (ESR) with increased resonant frequency. The system requirements challenge traditional capacitors using solid leads in these applications due to higher ESL and skin depth limitations of lead surface and cross-sectional conducting area.
Electronic Concepts Inc. (ECI) is a vertically integrated capacitor manufacturer with unique capabilities including advanced plastic-dielectric manufacturing, metalizing and converting, state-of-the-art machine shops, materials research labs, and environmental and performance testing labs. These capabilities allow the development of innovative film capacitors delivering advantage to customer systems. ECI provides power designers the ability to realize optimal performance in systems employing the latest circuit components and technologies.
Circuit and Capacitor Designs
The circuit designer and capacitor designer have methods to address certain aspects of operating at higher switching and harmonic frequencies. The general principle is to cancel the ESL of capacitors through the mechanical configuration of opposing current flows and increase conductor surface area relative to skin depth and operating bandwidth. Understanding those comparative approaches allows the circuit designer to choose the correct combination of circuit and capacitor designs to optimize performance and cost. It is also essential to understanding capacitor specifications, and the impact of specification requirements on capacitor design and cost.
What is Skin Depth?
Current flows along the surface of a conductor at a depth relative to frequency referred to as skin depth. Figure 1 shows skin depth, δ, around the perimeter of round and flat conductors. Skin depth is the effect of increasing conductor resistance by decreasing conducting depth as frequency increases. As skin depth decreases, the conducting cross-sectional area decreases, and the effective AC resistance of the conductor increases. The capacitor terminations and internal conductors must provide sufficient surface area for best performance. At high frequency, typical solid lead wires can exhibit increased resistance and heating. The capacitor designer can provide multiple leads or flat copper conductors to offset skin depth. The conductor current required defines the cross-sectional conducting area needed to prevent overheating. The proper conductor design results when the DC and AC resistance of the conductor are equal at the required frequency. In general, the conductor should operate at full current rating up to the resonant frequency of the capacitor.
Table 1 shows the equation for skin depth calculation as δ = √(ρ / (πfµ)). As the resistivity of the conductor increases for different metals, the skin depth required increases. Figure 2 shows the skin depth of copper and aluminum conductors versus frequency in thousandths of an inch (mils). At 1 kHz, the skin depth of copper is approximately 87 mils; at 100 kHz, it decreases to less than 9 mils; and again to less than 3 mils at 1 MHz. The skin depth must be less than the radius of around conductor or half the thickness of a flat conductor to maintain low resistance at high frequency. The threshold or crossover maximum frequency occurs when the skin depth equals the radius or half thickness. Above this threshold frequency, the conductor will get hotter as the conducting cross-section is insufficient and the resistance increases. The resonant frequency of the capacitor must be less than the threshold frequency.
As the ESL of the capacitor decreases, the resonant frequency increases. The capacitor designer must increase the surface area of the conductors until the total cross-sectional conducting depth is sufficient to maintain low resistance over the extended operating bandwidth. Multiple leads per capacitor termination, hollow bushings, tubes, flat foils, or tab conductors are typical methods. All ECI capacitors intended for high-frequency operation like resonant capacitors, snubbers, feed-through capacitors, and EMI filters employ these increased surface area conductors for terminals and internal construction.
Increasing switching frequency decreases the capacitance required as a function of acceptable voltage deviation and capacitor self-resonant frequency. In lower power applications, a double-sided PCB with multiple parallel capacitors arranged for equal and opposing current flow provides inductance cancellation at board level. This method uses lower cost standard box or wraps and fills capacitors. The double-sided PCB provides further inductance cancellation and the result is a low ESL apparent to the circuit. Figure 3 shows a snubber circuit using this technique.
This approach, however, requires a higher component count and the additional cost of the PCB and assembly. In high power systems, it may be more cost-effective to use larger power capacitors designed and manufactured to provide low ESL as a standalone module. The choice of which strategy to employ depends on a cost-benefit analysis at the system level.
Film Capacitor Design
Designing film capacitors for high-frequency applications requires the capacitor designer to employ mechanical techniques of winding geometry and assembly cancellation technologies. Plastic dielectric capacitors are rolled windings of two or more dielectric layers. Figure 4 shows the components of a wound capacitor including the fixed inactive aspects of margin and offset. The area required to provide the needed capacitance dictates the length of dielectric rolled into the winding. By decreasing the material width, the fixed inactive aspects of the winding decrease the volume efficiency. However, narrower material widths increase the peak and RMS current capacity.
The geometry of the rolled capacitor winding greatly affects the peak and RMS current capacity, and reliability as a factor of thermal performance. Capacitor windings with a high diameter to length ratio (narrow dielectric width wound to a large diameter) perform better than capacitors of a low ratio (wide dielectric width wound to a small diameter). Certain aspects of the wound capacitor are fixed such as the inactive margin and offset necessary to provide voltage clearance and metal end spray connection. Long thin capacitors have better volume efficiency but worse thermal performance than short fat capacitors due to the fixed aspects as a percent of the capacitor length.
Since capacitance is only a factor of the active area for any given voltage, the capacitor designer selects the best dielectric width providing the optimal ratio of performance to volume efficiency. Table 2 shows a comparison of capacitor performance parameters as a function of dielectric material width. The dielectric thickness is five microns, and only the dielectric width varies between 50 mm and 100 mm. Capacitor windings without ESL cancellation techniques have an inherent inductance of approximately 14 nH per inch of capacitor length.
The comparison shows when the material width is halved, the resonant frequency increases 42% from approximately 67 kHz to 95 kHz. The power advantages of half the material width are also apparent. The ESR drops 78% from 9.29 mΩ to 2.06 mΩ, and the peak and RMS current capacity more than doubles. The lower ESR and thermal coefficient result in much less internal heating and over a magnitude increase in life projection. The plastic dielectrics used are organic and follow the 10°C rule where every 10°C decreases double the life. Furthermore, using construction techniques, the ESL drops to 5-10 nH, and the resonant frequency more than doubles, thus increasing the operational bandwidth significantly.
ESL and ESR of a Capacitor
ESL and ESR of a capacitor are functions of geometry and mechanics employed by the capacitor designer. The geometry of the capacitor winding influences the peak and RMS current capacity as well as loss factors like ESR as shown previously in the Table 2 comparison. ECI design methods for low-ESL high-power film capacitors include concentric winding, wide copper terminations, integrated laminate bus structures, conductor shielding, and internal current reversal in winding arrays.
Figure 5 shows a concentric wind. ECI has the ability to wind one discrete capacitor over another on various open cores. A barrier layer of insulation film separates each capacitor in the winding. Several configurations are possible including individual capacitors isolated from each other, parallel connected for higher capacitance, or series connected for higher voltage and corona inception. For each configuration, the terminations and internal connections reverse current direction through each capacitor in the winding. This forms a true coaxial winding effectively canceling the inductance of the completed unit. Double or triple concentric wound capacitors are possible on open cores ranging from 9-38 mm diameter. ECI provides additional cancellation techniques for the terminals exiting the package to realize ESL down to 5 nH as provided in the LH3 product series, and optionally offered in UL3 and MP3 DC link series.
Figure 6 displays a few ECI capacitors series using some of the various techniques discussed.
Understanding Capacitor Specifications
Many times specifications given for capacitor performance reflected in literature are “in circuit” assuming the use of certain board-level inductance canceling practices. For instance, board mountable DC links with multiple leads are stated by some manufacturers as having very low ESL below 10nH. These units consist of multiple independent capacitors and lead pairs packaged into a single housing, but require the circuit designer to use a PCB design reversing the current flow through each of the individual capacitors. The user should verify if the specification is the standalone component ESL or the installed in circuit ESL.
A capacitor design incorporating multiple discrete insulated capacitor windings into a single housing with multiple leads sets exiting the package facilitates board soldering. Each lead set is a separate capacitor isolated from the others in the package but paralleled tightly together. The circuit PCB design then connects the parallel capacitors forming a single apparent capacitance to the circuit. If the PCB design reverses the current direction through each capacitor in the package, the minimum effective capacitor ESL occurs. The net effect is realizing the total bussed capacitance and the minimum circuit ESL. However, if the PCB design simply busses all of the leads together on each side of the capacitor package, the resulting ESL is much higher as the individual capacitor currents couple by flowing parallel in the same direction. The double-sided PCB has cancellation effects that may mask the capacitor ESL at board testing, but the capacitor itself will not function as desired with increased resonant frequency and operational bandwidth.
Electronic Concepts offers product series addressing either board-level cancellation by the user or as packaged assemblies. A wide range of terminal alternatives offered allows the user to choose single leads, multiple leads, multiple pins, flat terminals for solder or bolt down options, or units incorporating coaxial windings with laminate busses into the package with bolt down, or bolt through options. ECI capacitors meet very low ESL specifications as standalone devices through the specific winding and internal cancellation techniques. The principles of coaxial design and laminate buss structures employed by ECI capacitor designers provide low ESL capacitors with high resonant frequency. ECI capacitor specifications represent the standalone values without additional system-level cancellation practices.
The consideration for the circuit designer is which approach is most cost-effective. The designer may choose to design the PCB to provide parallel bussing and inductance cancellation. Alternatively, the designer may use a capacitor specifically designed and manufactured to provide inductance canceling internal to the package. As the capacitance and current requirements increase, larger capacitor modules designed for high-frequency operation are more cost-effective. At a system level, buss work is minimized, and the low component count increases reliability and decreases installation labor.
Bandgap Material Advances
Advances in wide bandgap materials for semiconductors deliver higher switching, harmonic, and EMI frequencies. Capacitors used for snubbing, ripple filtering, and resonant applications must meet the demands of new power circuits. Decreasing capacitor ESL and increasing resonant frequency allow the capacitors to operate over a higher bandwidth. The capacitor designs must account for conductor heating resulting from the insufficient cross-sectional conducting area due to skin depth at high frequency. Choosing the capacitor technology providing the optimum combination of cost and system performance is a user choice of system and capacitor design options.
Electronic Concepts Inc. is a vertically integrated capacitor company designing and manufacturing dry plastic-dielectric capacitors meeting the challenges of high-frequency power applications. ECI internal research and development efforts develop technologies delivering system performance advantages of low power loss over a high operating frequency range. ECI product lines range from axial leaded board mountable capacitors to sophisticated low ESL designs incorporating cancellation techniques of coaxial winding and laminate buss structures giving power system designers optimum performance and value.
ECI engineering will work with system designers to provide the best design solutions for each requirement. Contact us with your design challenges and we will recommend the correct product series or design a specific solution delivering the best performance and value for your application.
About the Author
Joseph Bond works as the President and Director of Engineering at Electronic Concepts, Inc., where his responsibilities focus on driving growth and expansion into new technologies, products, and markets and directing research and development in collaboration with customers and industries. He is specialized in dielectric research and development; solvent cast dielectric production; capacitor technology research and development; capacitor design for stringent requirements; and capacitor innovations for power and high-reliability applications. He earned his degree in Civil Engineering at Virginia Polytechnic Institute and State University. He then acquired his degree in Electrical Engineering at Monmouth University located in New Jersey. Finally, he then achieved his Bachelor's Degree in Business Management with honors at University of Pheonix located in Phoenix, Arizona.