Design Methodology for First Pass Success: A rationale for hardware simulationJune 02, 2016 by Mike Walters
This article highlights the importance of modelling and simulation task in design methodology to reduce the number of design iterations and acquire knowledge
Market dynamics and competition demand timely new products. This increases the pressure to speed-up product development. In this article, I recount my experience and the role of simulation to reduce and even eliminate design iterations to minimize development time.
Technological change is occurring at ever-faster rates. Just think about how much things have changed in the past 10 years - computing speed, electronic navigation, the internet of things, and self-driving cars. Technology has replaced old business with a new business — digital cameras displaced film cameras and now your cell phone includes an integrated camera.
Also, consider the increasing rate of change of technology as illustrated by the adoption of the cell phone, which was 7 times faster than the landline phone. Engineers made all of this change possible by being at the forefront of the technological revolution. This rate of technological change is challenging engineers to speed up their new product development cycle.
The design methodology presented here promotes the virtues of power system modeling and simulation. Specifically, this design methodology reduces the number of design iterations for integrated circuit (IC) design and development, and is broadly applicable to all power electronic design. I detail my experience with fast time-to-market IC development and contrast the approach with other techniques intended to reduce the product development time.
Figure 1: Product development process
Figure 1 illustrates the steps of the product development process. The development starts with the new product requirements as an input to the design phase. Fabrication builds the product from the design, followed by validation that the product meets the requirements. If during the validation step the product does not meet the requirements, the design must be revisited (red arrow). The steps of design, fabrication, and validation, commonly known as the development cycle, repeat until the product successfully meets the requirements for release to production.
There is an ever-increasing need to speed up new product development. The market and competition pressure companies to reduce the time-to-market for their products. Development organizations scrutinize each of the development steps (design, fabrication, and validation) in an effort to hasten product release and this may lead to adopting short cuts. Many of us have witnessed cases where such short cuts lead to the product failing one or more of the validation tests. Of course, the development time increases because of the effort needed to correct the issue, refabricate the product, and repeat validation.
One way to speed up a new product development is to reduce the number of development cycle iterations. Rather than focusing on each development step (design, fabrication, and validation), let us consider how to validate the product with the first design effort. I assert that a better understanding of the design reduces the number of iterations. Simulating the design adds to an engineer’s knowledge and leads to a better understanding of the product.
I have witnessed companies actively discourage any activity that increases the design time. Under the mantra of failing fast, they would rather quickly get the product fabricated, find issues through testing physical hardware, correct the design and refabricate the product. With this approach, the responsible engineer finds and resolves issues and learns more about the design. However, by the time the development has advanced to hardware, there are a number of constraints on solving any issues. It is more expensive to change the form factor or add components at this phase of development compared with exposing and mitigating issues during the design phase. Simulating the design to expose issues allows less costly resolution during the design phase and minimizes development cycle iterations.
Some believe it is counter-intuitive to increase the design time with a simulation task. After all, simulation can be intimidating. Some simulation tools have a steep learning curve requiring the engineer to expend effort in understanding the tool’s operations and procedures. Unsuccessful simulations may report cryptic error messages or just simply fail to complete. Engineers would rightfully prefer to expend their effort on their assigned project and not on the simulation tool. In addition to learning a simulation package, a successful simulation also requires engineers to expend effort on a model. Constructing the model may be intimidating. However, model building directly increases an engineer’s understanding of the design. I would argue that this is a worthwhile investment. Later in this article, I describe my process of model development.
Failing fast takes too long
Simulation during the design phase shortens the end-to-end development time even though it lengthens the design time. Figure 2 illustrates the design cycle as a timeline for both methodologies. The fail-fast approach quickly fabricates the product by minimizing the design time and identifies the issues during validation testing. Comparatively the design interval of the simulation approach is longer.
Figure 2: Product development timeline
Consider the time required to fabricate and validate the product. If we gain confidence (with simulation) that the product will pass validation the first time, then we avoid the time repeating the fabrication and verification phases. The total end-to-end development time is shorter than the methodology with multiple design iterations. The justification for simulation in terms of development time is a simple inequality. A simulation effort that is less than the fabrication and validation efforts will be faster development time. The premise is that a better understanding of the product design reduces the number of development cycle iterations.
TSimulation < TFabrication + TValidation
Simulation reduces development cycle iterations
In my experience, a design methodology that includes a simulation task does indeed reduce the number of design iterations. The development of ICs and solutions to power Intel’s CPU provides a good example. As background, Intel would issue a power requirements specification and a release schedule for their next-generation CPU to multiple IC vendors. This was essentially a race for the IC vendors.
Figure 3: First pass development process
The first vendor to sample their IC and power solution to customers would be in the best position to win the business. I used simulation in my role for one of the IC vendors to design the power solution and define the control IC. I am proud that the market rewarded us with a majority share for multiple generations of Intel CPUs. Over the course of several generations, we were able to sample our IC and power solution on the first pass. There are multiple factors for this success, including a great team, but limiting the number of design iterations with simulation and being fast to sample our solution was key.
Figure 4: Initial simulation uses ideal models
Let me contrast this design mythology, which includes a simulation task with the fail-fast approach. The fail-fast approach by definition means the total development time needs at least two fabrication and two validation intervals. IC fabrication time takes several weeks and more typically, 8 to 10 weeks to process the initial wafer, cut into the die and package the IC in a chip carrier. The fabrication of a power solution as reference design is concurrent with the IC fabrication and takes a few weeks (depending upon the complexity) to fabricate the printed circuit board (PCB) and populate all of the components.
Validation of the initial design also takes several weeks depending again on the complexity and the required compliance testing. Clearly expending a couple of extra weeks of effort to model and simulate the design with the goal to reduce the number of design iterations yields a faster development time. Failing validation extends the end-to-end development time by over 2 weeks: to correct the issue, refabricate the IC and repeat revalidation testing.
Another example of a first pass success also used the simulation methodology. The company’s objective was to reduce the cost of an LED bulb and my approach was to develop a new control IC along with some minor power driver modifications. Short development time was necessary to improve corporate margins. My role was to define the IC and work with an IC vendor on the design and development. The project challenges included a new IC architecture and a remotely located IC vendor. The simulation effort helped overcome these challenges and resulted in a functional IC on the first pass that enabled us to start validation. The design team found a minor ESD issue on one of the pins of the initial IC, but the issue quickly corrected and allowed us to meet the initial schedule. There were many factors to this first pass success, but the simulation model was one of the key factors.
A template for simulation
Figure 3 details the simulation tasks within the product development process. A successful simulation strategy builds a model of the relevant parameters. Clearly define your modeling objectives to avoid unnecessary complexity. Start with a simple initial model, and run a quick simulation. If the results meet your expectations, continue incrementally building the model. Simulation allows you can quickly expose and mitigate any issues without the constraints imposed by the hardware.
It is difficult for me to separate the design and simulation activities. The design parameter calculations are concurrent with the placement of components into the schematic of the simulation tool. Below I describe the modeling and simulation steps using the LED bulb development as an example. The steps include an initial model, a definition model, and a development model.
The initial simulation uses simple and idealized models. For example, a voltage-controlled switch represents the main switching MOSFET (Figure 4a) and a voltage-controlled current source with a capacitor represents the error amplifier (Figure 4b). Keeping the initial model simple speeds up the simulation and it is easier to troubleshoot. I use this initial model to develop the control algorithm. For a new control algorithm, it is best to start with a simple analog behavioral model and add digital elements as the model evolves. After successful validation, additional parameters add to or replace the ideal functions of the initial model.
The definition model development identifies the functions for integration and adds bandwidth, offset time delays, and common mode signal limits. I use parametric simulation to help establish the limits in the IC specification. Further parametric variations of the definition model document the impact of external component tolerances and variations on system requirements.
I share the simulation results, which include start-up, and transient disturbances with the IC design team. The simulation model and results supplement the IC specification. The simulation provides an excellent communication medium for the expected system performance over the operating range, compared with the static limits shown in the specification.
The model continues to evolve during the IC development. The simulation results help communicate some of the design nuances with the vendor’s IC designers. The IC development model supports the trade-offs and design decisions that typically involve the reuse of IC functions. As the design evolved, the IC development model is revised with parameters and characteristics of the functions selected for the final design.
My simulation tool of choice is SIMPLIS and its features documented in the reference. I like SIMPLIS because it is easy to use, specifically designed for power electronics, and it does not have convergence issues. SIMPLIS helps me focus on product design. It is intuitive with minimal learning to get started and yet supports advanced functionality for more complex modeling needs. During the LED bulb development, I evaluated phase dimming by adding a TRIAC dimmer model in series with the AC source of the definition model of the LED driver. I also evaluated conducted EMI by adding a LISN model in front of the definition model with good results. Both of these simulations required exercising the model for over 500 ms of run time while switching at frequencies just below 100 kHz and SIMPLIS completed each task in less than 3 minutes.
I have also found the simulation model helpful for issues that are difficult to solve with hardware alone. Some nodes are hard to monitor in hardware, which complicates troubleshooting. With simulation, you can easily probe these nodes while comparing with signals easily observed on the hardware. In addition, simulation can help you evaluate tolerances and parametric shifts of components, which can help improve the manufacturing yield of high volume designs (where you are likely to have components from the entire distribution curve).
Admittedly, developing valid models requires time and effort, but you can reuse the verified models in future designs. Always weigh the simulation effort against simply testing the hardware. For example, the model of the TRIAC dimmer referenced above was only valid for a single dimmer. Developing and verifying a model for each of dimmers offered on the market would be a huge task. Instead, we elected to validate the LED bulb hardware with a representative sample of dimmers. I used the single TRIAC dimmer model to validate the dimming algorithms incorporated in the IC.
I have been fortunate to be part of some great development teams that have achieved first-pass design success. The design methodology used in all of the first pass successes benefited from the knowledge gained by simulation. I encourage all engineers to simulate their designs.
The time to develop products is bound to get faster in the years ahead. If we recognize that successful validation of the product is the result of an engineer’s knowledge of the design, the product development team should invest in the design interval with the goal to validate the product the first time. My experience has shown that modeling and simulating the design is the best method to acquire the knowledge to achieve first-pass success.
About the Author
Mike Walters has over 35 years of power electronics design experience in the fields of LED lighting, computer power, and military aerospace. He has filed over 60 US patents with Cree, Intersil, International Rectifier, IBM, & GE. Mike is currently the proprietor of Walters Power Electronics, LLC specializing in power supply system architecture, system & product simulation, competitive analysis, integrated circuit definition as well as analog/digital control & circuit design.
This article originally appeared in the Bodo’s Power Systems magazine.