Innova Macroprocessors

Silicon Power Corporation (SPCO) has introduced novel thyristor-based devices that dramatically outperform the previous state of the art. These devices increase surge current densities by a factor of 10, increase speed (di/dt) by a factor of 100, and turn on with so little loss that they can operate in soft-turnoff circuits at resonant frequencies above 100 kHz. SPCO has achieved these advances by applying integrated circuit manufacturing technology to 4-layer devices and by adding novel packaging.

 

Figure 1: Schematic Diagram of a GTO

 

Standard GTOs (Gate Turn-Off Thyristors): To provide a context for the discussion of SPCO innovations, we briefly discuss standard GTOs (see Figure 1) and their limitations. Manufacturers typically fabricate these 4-layer npnp devices on a 4-inch n- wafer (one device per wafer, see Figure 2). They implant boron into the p region layer at the top and the p+ player at the bottom. They diffuse both sides to depths of about 100 microns. They bevel the edge of the wafer at an angle to 2 to 3 degrees to increase the breakdown voltage of the device. They deposit a metal anode layer on the bottom of the wafer, and they pattern a metal cathode and gate layer on the top.

GTOs turn off when a negative voltage appears at the gate terminal. These devices require a highly interdigitated gate electrode to minimize resistance in the P-layer. A standard GTO contains about 2000 cells, each cell measuring about 800 microns in diameter, each having its own gate. A distance of about 400 microns separates each cell from its neighbors. The device contains 50 cells per square centimeter.

 

Figure 2: Standard GTO 4 Inches in Diameter with 50 Cells/cm2

 

In principle, each cell in a standard GTO can turn off 10 amps. However, manufacturers typically under-rate devices by a factor of 5; in practice, a 2,000-cell GTO turns off no more than 4,000 amps. Manufacturers often under-rate the devices because they cannot create sufficiently uniform conditions throughout the P-layer. If, for example, the resistance of the cells varies, then the current flows preferentially to those with the least resistance when the device turns off. If the current to a given cell exceeds a certain threshold, that cell might not turn off at all.

Super GTOs: To create uniform conditions throughout the P-layer, Silicon Power Corporation has shrunk the cell dimensions and begun to fabricate GTOs at an IC foundry.

We refer to these new devices as Super GTOs or S-GTOs. S-GTOs contain cells only 15 microns in diameter spaced 5 microns apart (see Figure 3).

 

Figure 3: Super-GTO Chips on a 6-inch Wafer with 100,000 Cells / cm2

 

This approach increases the cell density by a factor of 2,000, from 50 to 100,000 cells per square centimeter.

We diffuse boron into the p-regions at depths of only 10 to 20 microns. S-GTOs can operate with such shallow diffusion profiles because we no longer have to bevel the edges to increase the breakdown voltage; instead, we increase the breakdown voltage via a proprietary process.

When compared with a standard GTO, a Super GTOs offers three main advantages:

• Lower forward drop, attributable to the S-GTO’s exceptional upper transistor (see Figure 4, bottom).
• Higher di/dt, attributable to the 2000x higher density of cells, all of which turn on simultaneously within 200 nanoseconds.
• Higher turnoff capability (more than 2x that of a standard GTO of the same size). All the cells turn off within a 100-nanosecond window. This high turnoff capability renders S-GTOs particularly desirable for high-voltage motor drives and power supplies.

 

Figure 4: Standard GTO (top); SGTO (bottom)

 

Modern simulation tools confirm our experience that if we make the upper base layer of the S-GTO as narrow as the equivalent layer in an IGBT, then the S-GTO achieves the same physics-based triple tradeoff among blocking voltage, switching speed, and forward drop as a p-i-n diode with the same voltage capability. The S-GTO achieves a conduction loss similar to that of a diode, much lower than that of an IGBT.

 

Ultra-High Current Packaging – Foundation Of The Innova Macroprocessor©

SPCO invented the ThinPak, a device package that can handle cathode and gate currents an order of magnitude higher than those of a standard GTO. We added to the device second-metal (M2) layer stripes that run at right angles to the 10-µm wide metal-1 (M1) emitter and gate fingers that carry current to and from each S-GTO cell. We solder a stamped copper bus to the top lid metal to provide both the gate and cathode external electrodes, as well as pins for gate and gate return.

We mate the S-GTO’s M2 layer to a 4-mil copper-clad ceramic lid with a mil or two of high-temperature solder, effectively changing each 2.5-µm thick aluminum M2 stripe into an effective on-device power current bus. We feed these stripes through the lid to the top surface; i.e., to the two cathode pads and center gate pad seen in Figure 5. The turn-off waveform on the right of Figure 5 shows both gate and cathode at 7.6 kA. The base cell turn-off capability at 200V (with overshoot to 500V) exceeds 7 kA, a tribute to the combination of narrow cell width and ultra-low, highly uniform gate-cathode cell current loop inductance.

 

Figure 5. ThinPak lid concept (upper left) and practice. Center: Metal-2 (top) collects current from 10 um cell level gate and emitter metal-1 stripes. We solder it at high temperature to a 4-mil copper underside lid metal (next), resulting in a lidded S-GTO. We then passivate the edges with RTV or epoxy for termination strike and creep (bottom). Lower left shows part of a prescribed panel of lids for this 600 x 900 mil device. Right: Turn-off at 200V, 7.6kA!

 

The large size and arrangement of the lid-top pads cancels magnetic far fields and leads to a measured lid inductance of about 0.6 nH, just small enough to turn off 500 A at temperature and voltage by merely shorting the gate with a lid-mounted, 0.5-mΩ array of FET’s that occupy less than half the lid surface (see Figure 6).

The ThinPak also conveys a mechanical advantage: the lid constrains the device, reducing thermal expansion stresses by about 40%. As a result, the device offers a higher cycles-to-failure ratio by about two orders of magnitude, compared with an unlidded large die mounted on an AlN substrate.

 

Figure 6: MTO Configuration with Lid Mounted FETs

 

Innova Macroprocessors© Applications

Herein, we present some of the many applications for S-GTO modules: scalable power supplies, power systems to reduce NOx emissions from coal power plants, utility current limiters, utility-transfer switches, and pulse switchgear assemblies.

 

Application – Reduction of NOx emission

Globally nations are seeking to implement stricter guidelines for NOx emissions fired by coal plants and are collaborating with multiple industries to identify new advanced technologies to accomplish cleaner flue gas emissions.

One approach is to develop a reliable system to bombard flue gasses with a high-frequency electronic beam to break the molecular bonds of nitric oxide and nitrogen dioxide (NOx, see figure 7) leaving clean oxygen (O2) and nitrogen (N2) instead.

 

Figure 7. Industrial Level NOx System

 

The concept has been proven on a small scale using a mixture of just NOx and nitrogen. When the powerful pulse of electrons leaves the cathode it hits the NOx which absorbs the energy and breaks the bonds. Firing is made in short pulses – several times a second for long durations.

Considering NOx bonds typically break at 4 at 4 electron volts (eV) of energy, we can expect a 400,000 volt electron beam to break 100,000 bonds making it highly efficient low cost – low maintenance solution.

 

Utility Innova Macroprocessor© (IM): Standard Building Block (SBB)

This configuration of the Innova Macroprocessor targets medium voltage grid inverter/converter and motor drive applications. It has served in both hard and soft switched applications. It finds grid application in StatCom (Static Compensator) or HVDC systems.

 

Figure 8: SGTO-Based 8-Module, High-Frequency SSB Innova Macroprocessor© 3.5kV/1kA at 10-20kHZ (air-cooled)

 

Innova Macroprocessor © Solid-State Fault Current Limiter (SSFCL)

The Solid-State Fault Current Limiter (SSFCL), a FACTS (Flexible Alternating Current Transmission Systems) based system, limits the fault current to a safe manageable level when a fault occurs (e.g., in a power distribution or transmission network) without completely disconnecting source from the load. The S-GTO-based Silicon Power SSFCL limits the fault current safely within 100 microseconds by inserting a current-limiting reactance in series with the fault current path. It thereby allows the standard grid resources to deal with the reduced fault current as they were designed to do without being overpowered and allowing a level of grid control unavailable until now.

 

Figure 9: Solid-State Fault Current Limiter Single Line Schematic

Figure 10: SGTOBased Standard Building Block (SBB) 3kV/1.2kArms Continuous/4kApk Controllable

 

Figure 9 shows a single-line schematic of a grid-level SSFCL placed in series between the source and load to limit fault currents. Figure 10 shows an air-cooled Standard Building Block (SBB). Figure 11 shows a typical waveform from an SBB interruption test.

 

Figure 11: SBB-1 Factory Test for SSFCL: 2.4kVpk/1.8kApk Interruption in < 4us capable of 2.4kVpk/3.6kApk

Table 1: Some characteristics of Modules used in a High-Frequency Utility Innova Macroprocessor©

 

At grid level, systems must handle hostile environments and shipping and installation stresses. Figure 12 shows a three-phase 15.5kV/1.2kA NEMA (National Electric Manufacturers Association) enclosure for SSFCL. Figure 13 shows the inside of that packaged SSFCL (one of its three phases). Figure 14 shows the KEMA, a power test lab, run interruption test for a single phase.

 

Figure 12: Air Cooled 3-Phase 15.5kV/1.2kA SSFCL

Figure 13: Inside of Air Cooled 3-Phase 6-Level Stack Assembly for a 15.5kV/1.2kA SSFCL

Figure 14: Single Phase 9kV@23kA Applied Fault Current SSFCL KEMA Full Power Current Interruption Test

 

Innova Macroprocessor © Solid-State Static-Transfer-Switch (SSSTS/STS)

Silicon Power designed its SSSTS/STSs for medium voltages from 2.4kV to 68kV and currents from 400A to 4000A. When these systems detect a disturbance, they transfer the load from one source to another with sub-millisecond/sub-cycle reaction times. During a voltage sag, the SSSTS transfers from one source to the other within 100 µsec, and the STS does so within ¼ cycle. The complete SSSTS/STS systems consist of three-phase, properly series/paralleled solid-state thyristor ac switches, sensors (CTs & PTs), Silicon Power’s proprietary controller, disconnect breakers, and bypass breakers. We connect a static switch to each source. The third static switch operates as a tie switch. The outputs of the switches connect to each other and furnish power to two load buses. Figure 15 shows a three-phase 15.5kV/4kA SSSTS or STS. Figure 16 shows a single line diagram of the Silicon Power SSSTS/STS SplitBus topology.

 

Figure 15: Three Phase 15.5kV/4kA SSSTS or STS

Figure 16: Innova Macroprocessor © Solid-State Static-TransferSwitch (SSSTS/STS) Single line Schematic

 

The Silicon Power’s proprietary controller executes all automated operational functions of the SSSTS/STS. The controller also provides external status and control interface to SCADA systems via a Modbus TCP interface. The bypass and isolation breakers make it possible to perform maintenance, repairs, electrical tests, and emergency shutdowns without disturbing the loads. When the SSSTS/STS is bypassed (either thru SSSTS/STS controls, SCADA control or manually) the existing customer switchgear will function as an electromechanical changeover switch.

Pulse Switch Assemblies: Leading metalugy foundries and casting manufacturing centers have asked us to research and develop a Pulse Switch Assembly (PSA) for 400-kA, 10-kV capacitor discharge with a short tqq recovery time (tqq).

We are finalizing the PSA shown in Figure 17. It contains 192 20-kA high-voltage ThinPak S-GTOs.

 

Figure 17: 400kA, 10kV Pulse Switch Assembly (PSA). Module assembly ~ 4-liters, Sensor ~ 2-liters, bus ~ 6-liters. Clamp rods return current through 4-series, 6-parallel modules for very low inductance.

 

In the module shown at lower right, we paralleled eight die, each rated at 5 kV. At 20 kA per device, the module has a potential capability of 160 kA.

We have confirmed 120 kA experimentally, giving us a factor of two application margin in both voltage and current. The module gate circuit board doubles as the module cover. It includes gate-shorting resistors for low recovery time < 10us tqq) and series resistors for enforcing gate sharing and simultaneous turn-on. The gate drive derives from a secondary single turn through the board-mounted ferrite toroid and level voltage sharing with 4 series pairs of very high impedance resistors. Although the PSA is simply gated by a single turn threaded through the level toroid by a sub-microsecond gate pulse, it fits the Innova Microprocessor test - input power at ground, optically isolated and, at 1Hz, is convection cooled as well. Our PSA gate current exceeds by a factor of about 2000 the minimum current needed to turn on a single SGTO (~ 2 A compared to 1 mA), and the primary di/ dt is > 1 kA/microsecond. These specifications definitely fall into the category of over-achievement; they virtually guarantee that all 192 devices will turn on within nanoseconds of each other.

To assure very low inductance, we designed the modules to allow the clamping rods to double as the current return within the module. The low-inductance bus is 50% larger than the module assembly. We can easily configure the modules in various series/parallel combinations.

 

About Silicon Power Corporation

Silicon Power Corporation is a small U.S. business totally dedicated to the design, development and manufacture of power components, modules, products and sub-systems. Our success has been based upon our technical competence and our corporate flexibility. We have had a track record of successful partnerships with university, industrial and governmental entities to deliver state of the art solutions for power applications.

 

This article originally appeared in the Bodo’s Power Systems magazine.