Dynamic Power Path Management in Charger ICs

This article discusses the dynamic power path management (DPPM), a power management scheme commonly used today. The DPPM control loop dynamically regulates the charge current depending on the capacity of the input source current and the level of load current to obtain a minimum charge time for a given source and system load. With DPPM, the system can obtain power immediately once the input source is applied, even with a deeply discharged battery. The system voltage regulation method is also discussed.

 

An Overview of Dynamic Power Path Management

In mobile devices, a charger IC is being employed to allow charging of the battery when an external power source is applied. The system load of the mobile device can be supplied by either the battery, the input source, or both, depending on the battery and system load connection. To control this sort of power source selection, a power management scheme is necessary.

Dynamic power path management (DPPM) is the most popular scheme for power path management in mobile applications. Figure 1 shows the basic power stage structure for DPPM.

 

Figure 1: NVDC Power Path Management Structure

 

In DPPM, the system load is connected to the system bus (VSYS). VSYS can be powered from the battery through the battery FET, or from the input source through a DC/DC converter  or low-dropout (LDO) regulator. When the input source is not available, the battery FET is fully on, so the battery provides power to the system load.

When the input source is applied, VSYS is regulated by the input DC/DC converter or LDO. Simultaneously, VSYS provides a charge current to the battery through the battery FET. In this charging mode, the priority is given to the system load, and the remaining power is used for charging. The charge current is adjusted dynamically based on input source capability and system load level, obtaining a minimum charge time.

During the above charging process, if the system load is over the power capability of the input source, VSYS will drop. Once VSYS drops to a DPPM threshold, the DPPM control loop activates and reduces the charge current automatically to prevent VSYS from dropping further. This process is also called DPPM mode.

 

How DPPM Mode Works

In DPPM mode, if the charge current is reduced to zero, and the system load is still over the input power capability, VSYS continues dropping. Once VSYS drops below the battery voltage (VBAT) level, the battery provides power to VSYS through the battery FET. This is called supplement mode. In supplement mode, the input source and battery provide power to the system simultaneously.

Before entering supplement mode, if the battery FET is in linear mode (not fully on, for example when VBAT < VSYS_MIN + DV, or during a start-up transient), to ensure a smooth transition in and out of supplement mode, an ideal diode mode is preferred to control the battery FET, such as the one in the MP2624A.

During the ideal diode mode, the battery FET operates as an ideal diode. When the system voltage is 40 mV below the battery voltage, the battery FET turns on and regulates the gate driver of the battery FET. The voltage drop (VDS) of the battery FET is about 20 mV. As the discharge current increases, the battery FET obtains a stronger gate drive and smaller on-state resistance (RDS) until the battery FET is completely turned on. When the discharge current goes lower, the ideal diode loop generates a weaker gate drive and larger RDS(ON) to keep a 20 mV difference between the battery and system until the battery FET is turned OFF.

VSYS regulation in DPPM mode can be flexible depending on the system requirement. If the front-end converter from the input to the system is an LDO, VSYS can be set at a level to especially benefit the system requirement. For example, VSYS is 4.65V for the MP2661 and 5.0V for the MP2660.

If the front-end converter from the input to the system is a DC/DC converter, VSYS is usually set to follow the battery voltage to improve efficiency. This is commonly referred to as a narrow voltage DC (NVDC).

 

Advantages of DPPM Control in Charger ICs

The advantages of DPPM control are:

1. The system gains power immediately once the input source is applied, regardless of whether the battery is depleted or not.
2. The charge current is adjusted dynamically based on the input source and system load to achieve a minimum charge time.

The limitation for DPPM control lies in the fact that it is complicated to ensure a smooth transition between the different operation modes. Usually, a VSYS loop, ideal diode loop, charge voltage, and charge current loop are required for battery FET control.

With DPPM control, the system can obtain power as soon as the input source is applied, even if the battery is depleted. The charger IC with DPPM control can also optimize the charge current to fully utilize the input source current capability. Although the control for DPPM is complicated, DPPM is widely used in charger ICs that require power source selection. These charger ICs include MP2624A and MP2660.  

 

About the Author

Aaron Xu is a technical marketing manager at Monolithic Power Systems (MPS) that is a company with the highest quality power solutions for industrial applications, telecom infrastructures, cloud computing, automotive, and consumer applications.

 

This article originally appeared in the Bodo’s Power Systems magazine.