EEPower

Improving Parameters for SiC Technology

This article examines a new generation of SiC technology, focusing on holistic system efficiency, durability, and system cost.


Technical Article Mar 19, 2025 by Adam Barkley

This article is published by EEPower as part of an exclusive digital content partnership with Bodo’s Power Systems.

In a market where some players narrowly focus on specific figures of merit (FOM), such as conduction losses, room temperature RDS(on), or RDS(on) × Qg, Wolfspeed takes a broader and more integrated approach. By simultaneously improving conduction losses, switching behavior, ruggedness, and reliability, Wolfspeed’s design philosophy is heading for comprehensive performance. The Gen 4 MOSFETs deliver enhanced metrics that simplify system design and usability without compromising ruggedness and durability.

Targeted at high-power automotive, industrial, and renewable energy systems, Gen 4 MOSFETs constitute a paradigm change in SiC technology. These devices provide a versatile foundation enabling a long-term road map of application-optimized bare die, module, and discrete products. Every Gen 4-based design focuses on three performance vectors: holistic system efficiency, remarkable durability, and low system cost—all of which let designers reach unheard-of performance and value.

 

The Importance of Conduction Losses

Minimizing conduction losses is critical for key applications such as traction inverters in electric vehicles (EV), industrial motor drives, and Artificial Intelligence (AI) server power supplies. These systems operate across a wide load range, often spending significant time at low power levels. Reducing conduction losses improves efficiency across the load spectrum, translating to extended EV range, better energy ratings for HVAC systems, and lower cooling costs in server farms due to reduced heat dissipation requirements. Additionally, lower conduction losses optimize the use of semiconductor material, enabling higher power levels or reduced material costs for a given application - a win-win for efficiency and cost.

In hard-switched applications, such as industrial motor drives, power supplies for AI data centers and active front-end (AFE) converters for grid-connected systems, the reduction of switching losses is paramount. These applications operate at varying loads. They sometimes run at very high power for short bursts, but they spend much of their lifetime at lower power levels. From an efficiency perspective, minimizing conduction losses helps improve efficiency across the entire load range. For example, in electric vehicles, this translates to an extended mileage or range achievable from a specific battery.

 

Hard Switching Applications

Reduction of switching losses offers two primary advantages. First, users can increase switching frequency, enabling smaller, lighter, and more cost-effective magnetics and capacitors. Alternatively, they can prioritize efficiency gains by reducing heat dissipation, lowering system-level costs through smaller heat sinks or reduced cooling requirements. These benefits are not mutually exclusive, giving engineers the flexibility to optimize designs based on their specific needs.

In the Level 3 DC Fast Charger shown in Figure 1, the AFE connects the converter to the grid. It converts the grid voltage into a stable DC link voltage, which is then used to charge the batteries. Unlike IGBTs, which are larger and less efficient, silicon carbide discretes and power modules reduce losses and improve efficiency due to their capability to operate at higher frequencies and temperatures, with reduced heat removal requirements.

 

Figure 1. Simplified diagram of a Level 3 DC Fast Charger. Image used courtesy of Bodo’s Power Systems [PDF]

 

Gen 3 versus Gen 4 MOSFET Performance

Minimizing conduction losses are important in all power electronic applications, whether hard-switched or soft-switched. Conduction losses are driven primarily by the on-state resistance RDS(on) of the power MOSFET evaluated at the application’s required current level(s) and resulting junction temperature(s). At full rated load current, the MOSFETs are generally operating near their maximum rated operating temperature (or lower by some design margin). MOSFET part number selection and ultimately system semiconductor BOM cost is determined by this high temperature RDS(on). Wolfspeed’s Gen4 MOSFETs reduce this high temperature specific on-state resistance by up to 21 %, with even more reduction at lower temperature. At light loads where current levels and junction temperatures are lower, RDS(on) reductions across temperature directly translate into improved system efficiency and longer operating lifetime.

To illustrate the switching loss and ease-of-use advancements in Gen 4 MOSFETs, consider the waveforms of a half-bridge switching event. While Gen 3 devices provide good performance and reliability, the advancements in the Gen 4 MOSFETs offer enhanced switching speed and reduced voltage overshoot, thanks to improved body diode performance and optimized design.

Figures 2 and 3 show the dynamic switching performance of a 1200 V Gen 4 device compared to the equivalent Gen 3 device. Gate resistance values were adjusted to provide matching di/dt during turn-on and dv/dt during turn-off. Although the Gen 4 device is capable of much faster switching speeds, this approach shows a conservative approach to compare device performance.

During turn-on, the body diode of the opposite MOSFET is commutated off, resulting in reverse recovery current flowing through the body diode and into the MOSFET that is turning on. The improved Gen 4 body diode behavior is evident in the turn-on current waveform, which shows a much faster current recovery, resulting in significantly reduced turn-on switching loss. Furthermore, the soft body diode behavior in Gen 4 results in less ringing after the switching event, reducing noise in the system and improving EMI performance. The turn-off behavior is similar between the two generations, providing low losses and low EMI.

 

Figure 2. MOSFET turn-on waveform comparison between Gen 3 and Gen 4. Image used courtesy of Bodo’s Power Systems [PDF]

 

Figure 3. MOSFET turn-off waveform comparison between Gen 3 and Gen 4. Image used courtesy of Bodo’s Power Systems [PDF]

 

The improved body diode performance, and thus improved turnon performance results in significantly lower switching losses in the Gen 4 device. The reduction in switching losses can be even higher in many cases as the Gen 4 device can operate at higher di/dt levels without exceeding the VDS safe operating area during reverse recovery. With Gen 4 devices operating under the same conditions, the reverse recovery is much softer, resulting in lower di/dt and significantly reduced voltage overshoot (about 900 V, corresponding to a 75 % reduction).

This improvement provides a 300 V margin below the 1,200 V rating, enhancing the factor of safety and robustness. This means that engineers can switch faster with existing packaging or achieve even greater performance with advanced packaging solutions.

Figure 4 demonstrates the losses between a 21 mΩ MOSFET of Gen 3 in comparison with a 25 mΩ device of the fourth generation. A 27 % ESW reduction is achieved at the rated current when matching turn-on di/dt and turn-off dV/dt. Further switching loss improvement is possible with some Gen 4 MOSFETs by utilizing a lower Rg value.

 

Figure 4. Switching loss comparison between Gen 3 and Gen 4. Image used courtesy of Bodo’s Power Systems [PDF]

 

The Gen 4 technology improves the performance of hard-switching applications with up to 15 % lower EON and EOFF, while conduction losses in soft and hard-switching applications can be mitigated with up to 21 % reduction in RSP at operating temperature (with 175 °C RDSON).

 

EMI Challenges

Another advantage of Gen 4 MOSFETs that is seen in the comparison of Figure 2 is the reduced oscillation and ringing after reverse recovery events. Compared to Gen 3, the smoother waveforms minimize common-mode voltage and radiated emissions, simplifying electromagnetic interference (EMI) filter design.

This reduction in waveform noise can streamline the development of systems requiring high-speed switching while addressing EMI challenges. For designers transitioning from Gen 3, Gen 4 offers a direct upgrade path with noticeable improvements in waveform behavior and system design flexibility.

 

Cosmic Ray Reliability

High-altitude applications, such as electric vehicles operating in mountainous regions or aircraft, are exposed to the risk of cosmic ray-induced single-event burnout. These events, caused by neutron flux (the number of neutrons per unit time striking the semiconductor), can generate a drain-to-source current (IDS) flow, potentially leading to undesirable consequences.

Gen 4 MOSFETs are designed with enhanced immunity, achieving up to 100× reduction in cosmic rays failure-in-time (FIT) rates compared to previous generations. This reliability improvement reduces the need for excessive voltage derating, enabling more efficient system designs. Additionally, they can survive overload and overstress events, with the die portfolio qualified for continuous operation at 185°C and limited life operation at 200°C.

 

Short Circuit Withstand Time

Short circuit withstand time, a critical parameter for motor drives and traction systems, ensures safe shutdown during faults. Gen 4 technology supports up to 2.3μs withstand time compatible with existing gate driver technologies without compromising RDS(on) performance. This combination of robustness and efficiency makes Gen 4 MOSFETs very suitable for demanding applications. This expands the safe operating area (SOA), ensuring robust performance. It enables designers to reduce semiconductor usage, lowering costs without compromising safety.

 

High-Frequency Soft-Switching Applications

In soft-switching applications, such as very high-frequency DC/ DC converters used in on-board chargers and the second stage of an industrial power supply, the design differs from hard-switched front ends. Switching losses are inherently minimized or eliminated, so conduction losses are the significant remaining losses. Typically, we have a hard-switched active power factor correction (PFC) stage at the front, followed by a soft-switched DC/DC converter stage. This converter stage often employs topologies like LLC, CLLC, phase-shifted full bridge, or dual-active bridge. In such designs, switching losses are less critical, although the components still need to tolerate high di/dt and dv/dt stresses, as well as handle high resonant circuits current.

The primary advantage of soft-switching applications lies in reducing conduction losses due to improvements in RSP. This reduction in conduction losses applies across the entire load profile, which is especially beneficial for applications with efficiency mandates, such as Energy Star standards. Many of these power supplies must comply with regulations requiring high efficiency across varying load levels, such as meeting the 80 Plus Titanium efficiency levels for server power supplies.

 

System Cost and Development Time

By improving conduction and switching efficiencies, devices manufactured with the fourth generation of Wolfspeed’s silicon carbide MOSFETs enable engineers to design systems with smaller, lighter, and less expensive components, such as heat sinks, EMI filters, and magnetics. Due to the Gen 4’s RSP performance, it is possible to achieve up to 30 % higher power output within the same footprint, enabling greater power density without additional real estate.

Enhanced robustness and reliability, including reduced sensitivity to environmental factors like cosmic rays, allow designers to use smaller safety margins, further minimizing the required semiconductor material. Additionally, the drop-in compatibility of Gen 4 MOSFETs simplifies the transition for existing users, reducing redesign efforts.

As shown in Figure 5, Gen 4 has a 3.5x improved body diode softness factor: MOSFETs effectively minimize EMI during reverse recovery scenarios, delivering smoother operation without trade-offs to QRR. Switching is both safe and clean, even at high dv/dt, supported by an up-to 600:1 capacitance ratio, which eliminates parasitic overshoot risks and ensures reliable system performance under demanding conditions. Together, these advancements enable developers to achieve a higher system performance while meeting stringent efficiency and reliability requirements, all within a compressed design timeline.

 

Figure 5. Technology comparison of body diode reverse recovery transients. Image used courtesy of Bodo’s Power Systems [PDF]

 

Packaging: Efficiency and Power Density

With their high switching speeds and thermal performance, silicon carbide devices push the limits of traditional silicon-based power packaging. Legacy designs often suffer from parasitic inductance, causing voltage overshoots, oscillations, and gate oxide damage. These issues compromise efficiency and necessitate costly design trade-offs. Advanced packaging techniques tailored for SiC minimize parasitic inductance in power, gate, and common-source loops, enhancing efficiency, reducing switching losses, and enabling the use of lower-rated SiC devices. Features like double-sided cooling and compact layouts support high-power applications, thermal control, and higher switching frequencies, unlocking SiC’s full potential for reliable and energy-efficient systems.

Minimizing inductance in power modules reduces voltage oscillations, ensuring clean switching and enhanced efficiency. Innovations like internal bus bars and clip attachments lower inductance to levels as low as 5 nH, resulting in reduced switching losses and stable system performance.

 

Packaging: System Reliability and Durability

Innovative interconnection methods are critical for improving power module performance. Traditional wire bonding is replaced with advanced techniques like top-side clip interconnections, offering lower resistance, improved thermal management, and enhanced mechanical reliability. Copper clips, soldered or sintered directly to the die, improve power flow and connection strength.

Silver sintering, a state-of-the-art die attach technique, creates robust bonds between the die and substrates like silicon nitride, ensuring excellent heat conductivity and mechanical durability. This approach is increasingly used in applications requiring high power and thermal cycling performance.

As power densities rise, effective thermal management is crucial. Direct cooling solutions, such as pin-fin designs where fins are submerged in the coolant, efficiently dissipate heat from the die. These methods enable SiC devices to sustain high performance under elevated temperatures, especially in automotive systems.

Reliability is paramount in automotive power modules, which must meet stringent standards like AEC-Q101 and AQG324. Advanced materials and processes address failure mechanisms such as moisture penetration and wire bond degradation. For example, epoxy mold compounds are replacing gel-based encapsulants, providing superior moisture resistance and structural integrity. Enhanced press-fit pin technology supports higher current capacities for PCB connections, accommodating compact and high-power designs.

 

Figure 6. Wolfspeed’s YM module platforms include pin-fin packaging technology. Image used courtesy of Bodo’s Power Systems [PDF]

 

Emerging Applications

The new Gen 4 SiC technology marks a step forward in the field of power electronics by balancing conduction losses, switching performance, and ruggedness. While some players focus on limited metrics like room-temperature RDS(on), Wolfspeed prioritizes delivering the most in-circuit value, at real-world operating conditions. The new platform will provide a foundation for a long-term roadmap of system-optimized power modules, discrete and bare die products, and it benefits industries ranging from electric vehicles and industrial motor drives to AI server power supplies, renewable energy systems, and avionics.

In EVs, lower conduction losses extend battery range, while in industrial motor drives, better efficiency reduces energy use and cooling costs. In hard-switched applications like motor drives and grid power converters, improved switching characteristics reduce system size and cost by enabling higher switching frequencies or better efficiency. Lower switching losses also simplify thermal management and support compact designs. Enhanced reverse recovery reduces EMI, easing filter design and compliance testing while addressing reliability challenges like cosmic ray-induced single-event burnout.

Gen 4 MOSFETs feature a two-microsecond short-circuit withstand time, ensuring safe operation during faults and compatibility with current gate driver technology. In soft-switched applications such as high-frequency DC/DC converters, reduced conduction losses enhance efficiency for systems meeting 80 Plus Titanium standards, like AI server power supplies. Renewable energy systems benefit from improved efficiency and thermal flexibility, reducing maintenance and enhancing reliability.

Emerging applications like avionics and eVTOL aircraft value the MOSFETs’ compactness, efficiency, and robust reliability. Designed for flexible integration, Gen 4 devices allow designers to optimize for performance or reliability, meeting diverse market needs while ensuring superior results.

This article originally appeared in Bodo’s Power Systems [PDF] magazine.