Toshiba Introduces U-MOS III Technology

September 20, 2001 by Jeff Shepard

Toshiba Corp.'s (Irvine, CA) US-based semiconductor unit has launched a series of power chips based on a third-generation trench-cell technology that increases speed while reducing on-resistance up to 25 percent compared with existing products.

The company said the introduction of its U-MOS III technology and packaging solutions reaffirms a commitment to power semiconductor markets. Toshiba said its new chip packages are among the thinnest surface-mount solutions available for portable products and wireless systems, such as cell phones and notebook computers. The U-MOS III technology is being targeted at medium-power devices.

Toshiba's third-generation process technology uses a new trench-cell structure MOSFET. U-MOS III was developed for power-management switching, lithium-ion battery-protection circuits and synchronous rectification at the secondary portion of dc/dc converters. The technology results in an on-resistance of 7 milliohms at 10V, which Toshiba claims is one of the smallest in the industry.