To keep Europe at the forefront of semiconductor technology, the European Commission will seed-fund an Integrated Project called NANOCMOS, which aims to pioneer the necessary changes in materials, processes, device architectures and interconnections to keep pushing the limits of semiconductor performance and density. Participants in the project will be charged with demonstrating the feasibility of 45 nm CMOS logic technology in 2005 while simultaneously starting research activities for the next-generation 32 nm and 22 nm technology nodes.
Partners in the project include Infineon, Philips and STMicroelectronics Inc. (ST, Geneva, Switzerland), as well as CEA Leti (France), IMEC (Belgium), FhG (Germany), CNRS (France), the Technical University of Chemnitz (Germany), Ion Beam Services (France), ISILTEC (Germany), Magwel (Belgium), and ACIES Europe (France), which will undertake some management aspects of the project. Additional partners could be incorporated into the Consortium in the future.
