GaN FET Enables Nanosecond Laser Driver Reference Design for LiDAR

January 09, 2020 by Paul Shepard

The TIDA-01573 LiDAR reference design from Texas Instruments showcases the low-side nanosecond GaN gate driver LMG1020, which is capable of driving a GaN FET to produce a 1-ns laser optical pulse in excess of 100W.

Applications of this reference design include: LiDAR for 3D mapping; LiDAR for non-automotive autonomous vehicles; LiDAR for distance measurements; Laser scanners; and Fiber optic integrity instruments.

With the increased popularity of LiDAR applications, the required specifications are constantly improving, especially for resolution and distance. For high-speed applications, the detection desired specification hovers around 300m for a 30-cm object with 10% reflectivity. This specification translates into a solution that requires 100W to 200W of light power and a repetition rate of up to 1MHz to fill a front facing field of vision (100° × 25° with a 0.1° resolution) and allow for a 20-Hz to 60-Hz refresh rate.

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TIDA-01573 Block Diagram (Copyright © 2018, Texas Instruments Incorporated)

With the popularity of near infrared (IR) wavelength at around 905nm, there is an eye safety energy limit of 250nJ that must be met. If the range of power has to increase, and to increase the resolution the repetition frequency has to increase, the only way to maintain emission under the safety limit is to have extremely high energy pulses for an extremely short amount of time (and low duty cycle).

The requirement then comes to 100W to 200W for 1ns to 2ns at a 1-MHz to 2-MHz repetition rate.

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This reference design uses the LMG1020EVM-006 to provide a LiDAR driver capable of this performance and guides through the consideration and specifications necessary to replicate such performance.

Features of the TIDA-01573 Reference Design:

  • Circuit Capable of Delivering 60A, 1-ns Current Pulses
  • Flexible Platform to Install and Test Laser Diodes
  • Latest GaN FET Driver Technology LMG1020
  • Advanced Minimal Inductance Layout

FET Selection

The specifications to select the correct FET for a LiDAR application are different than for normal power conversion applications.

To ensure the capability of reaching high currents in a nanosecond delay, the FET must fully turn on extremely fast. GaN HEMTs are a better candidate because of their high conductance characteristic (Gm). The table below compares the advantages of a GaN HEMT for nanosecond applications with respect to a silicon FET.

GaN vs Silicon Advantages (click on table to enlarge)

The selected FET can be sized significantly smaller than the full load current rating because this is a pulsed application.

Note that the peak current of the FET represents the saturation of the channel, and the RDS(on) increases rapidly beyond that specified current level, which means that the highest current possible in the system is ultimately limited by the maximal FET peak current.

The GaN FET vs MOSFET pulse comparison below shows the difference in switched current through the channel (ultimately available to the laser diode). The silicon FET peak current for a 2-ns pulse is 1/3 of a GaN FET. Below 2ns, the peak current for the Si FET reduces rapidly.

GaN FET vs MOSFET Pulse Comparison (click on image to enlarge)

In the 5-ns comparison, the half-power width for the GaN is ≈ 3 ns versus 5 ns for the silicon case, and the actual energy used is very similar but with a peak power of roughly half. The GaN FET solution would increase the application range by 80% and by 30%, respectively.

Finally, because of the extremely high di/dt and the ground lifting that occurs as a direct consequence, if the gate loop and power loop ground returns are tied together, the gate would detect a reduction in its relative voltage, effectively pinching the gate off. This reduction causes a negative feedback that slows down the turnon process of the FET.

To mitigate this effect, a split path for the two returns is necessary. Use a FET with a dedicated Kelvin gate ground return connection. The last consideration while selecting the FET is its capability to withstand the inductive voltage overshoot that appears when the FET turns off, especially if operating without clamping.

The initial target this reference design is to reach 40A and with a maximal bus voltage of 100V. The FET this design uses is the EPC2019 because of its dedicated gate Kelvin connection. The 200-V breakdown voltage rating assures the reliability of the part; a 40-A peak rating for 300µs is sufficient.

On a 1-ns pulse, the current must be able to ramp up to 60A, although it is possible to observe a rapid degradation in the system output efficiency in part due to the elevated current density though the FET.