Split-Output Topology Improves Dynamic Behavior in SiC MOSFET Modules

The body diode reverse recovery charge of a SiC MOSFET is lower than that of an Si MOSFET, but still not as beneficial as with SiC Schottky diodes. As the switching performance demands for new wide band-gap components increases, so do the requirements for the commutation process. Vincotech GmbH uses the split output topology in its modules to provide an additional tool to reduce turn-on losses and boost cross-conduction suppression. The following comes from a technical paper posted by Michael Frisch in Technical Marketing at Vincotech on, "SiC MOSFET-based Power Modules Utilizing Split Output Topology for Superior Dynamic Behavior."

Installed at the module level this approach negates the limitations of the SiC MOSFET. The module behaves in inverter applications in the same way as in a boost circuit. This makes it possible to achieve better performance and efficiency than with a SiC JFET or SiC BJT – and enjoy the added advantage of MOSFET technology’s simple gate drive circuit.

The standard half-bridge topology in power modules has its drawbacks for fast switching applications. If the body diode is used for freewheeling, the body diode’s reverse recovery current increases switching losses (see Figure 2-1). The reverse recovery load (QRR) of SiC MOSFETs is far superior to that of Si MOSFETs. However, it is still significant for high frequency applications >50 kHz. The reverse current increases turn-on losses in the SiC MOSFET. The output capacitance of SiC-MOSFETs is relatively high. In a low inductive environment, the active MOSFET has to switch the capacitive load (see Figure 2-2) of the device, which is turned off. This increases turn on losses and EMI.

SiC MOSFETs are designated for ultra-fast switching, which causes high dV/dt at turn-on in half-bridge configurations. The voltage at the output changes from DC- to DC+ at turn-on of the high-side MOSFET. The parasitic capacitor between the drain and gate of the low-side MOSFET will induct a voltage (see Figure 2-3) into the gate of the low-side MOSFET, which could trigger a parasitic turn-on. This will cause additional significant losses.

The idea is to separate the commutation circuit of the positive and negative half-wave or, in the case of a bidirectional dc-dc circuit, between the forward and backward conversion. The half-bridge is divided into one positive and one negative BUCK circuit. The commutation loop remains low inductive, whereas the low-side and high-side MOSFETs are separated by the inductance of the external interconnection and optional inductance connected at the output. This inductance helps transcend the half-bridge circuit’s limitations.

The split output allows the body diode with the additional SiC diode to be deactivated. In contrast to a configuration with a Si MOSFET, the voltage drop of the body diode in SiC MOSFETs is higher than in SiC diodes. The SiC diode takes the reverse current and prevents any reverse recovery charge in the body diode of the SiC-MOSFET. The inductance at the split output decouples the high-side from the low-side MOSFET. In the case of a SiC MOSFET, the external interconnection’s parasitic inductance already reduces the negative action of the output capacitance and cross conduction. At turn-on, the SiC MOSFET faces only the SiC diode with extreme low QRR. At turn-off, the com-mutation loop is closed with low induction via the SiC diode and the capacitor.

In high-efficiency applications, the body diode’s freewheeling efficiency improves with the MOSFET’s synchronous turn-on in reverse direction, which reduces the voltage drop. This operating mode is feasible in a split output topology with very low or even just parasitic inductance at the output. This mode affords engineers the opportunity to reduce the size of the SiC diode to its pulse current limit. The output inductivity will delay the reverse conduction in the MOSFET by several ns. The benefits of the split output have inspired a product definition that makes use of this design concept.

The split output topology installed at the module level negates the limitations of the SiC MOSFET. The module behaves in inverter applications in the same way as in a boost circuit. This makes it possible to achieve better performance and efficiency than with a SiC JFET or SiC BJT – and enjoy the added advantage of MOSFET technology’s simple gate drive circuit.