GaN Continues To Expand Its Role in AI Power Architectures

This article is published by EEPower as part of an exclusive digital content partnership with Bodo’s Power Systems.

Power delivery has become a critical design challenge in AI data centers. As GPU power requirements continue to increase, designers face growing demands to improve power conversion efficiency while reducing converter size and thermal losses. These requirements are driving the adoption of widebandgap semiconductor technologies, particularly gallium nitride (GaN), in the intermediate bus conversion stages of modern AI power architectures.

In this context, Efficient Power Conversion (EPC) has introduced the EPC2378, a 25 V GaN FET, and the EPC2370, an 18 V GaN FET. Both are part of the company’s latest Gen 7 product family, optimized for secondary-side synchronous rectification in high-current DC-DC converters. The EPC2378 features a typical R_DS(on) of 410 µΩ and a gate charge of 34 nC, while the EPC2370 offers a typical R_DS(on) of 280 µΩ and a gate charge of 26 nC.

Both devices are housed in a compact, thermally enhanced 3.3 × 3.3 mm PQFN package with an exposed substrate that supports dual-sided cooling. In addition to minimizing conduction losses, the devices are designed with low gate charge to reduce switching losses at a switching frequency of 1 MHz, improving overall efficiency and power density.

Why Dynamic Figures of Merit Matter More Than Ever

For years, low-on resistance has been the primary benchmark for evaluating power transistors. While minimizing R_DS(on) remains essential for reducing conduction losses, modern power converters increasingly rely on dynamic switching performance to achieve higher efficiency and power density.

According to Alex Lidow, CEO and co-founder of EPC, the EPC2378 and EPC2370 represent a significant technological advancement in this area.

“With previous generations of GaN, we didn’t even attempt to compete in the sub-40 V space because we couldn’t effectively challenge the best MOSFETs. Today, the EPC2378 and EPC2370 - with typical R_DS(on) values of 410 µΩ and 280 µΩ, respectively - mark a significant step beyond both previous generations of GaN and conventional silicon technology.”

Rather than focusing solely on reducing conduction losses, EPC optimized two critical figures of merit: R_DS(on) × Q_G and R_DS(on) × Q_OSS. “These figures of merit have become increasingly important in AI server power supplies, where switching frequency, efficiency, and power density must all be optimized simultaneously. You cannot simply improve efficiency by using a larger chip without incurring higher switching losses. Newer technology with a low R_DS(on) × Q figure of merit enables both low conduction and low switching losses,” said Lidow.

Gate charge (Q_G) determines how much energy is required to switch a device on and off. As switching frequencies increase into the megahertz range and more power devices are connected in parallel, gate drive losses become an increasingly significant contributor to overall converter efficiency and gate driver temperature rise. Likewise, output charge (Q_OSS) directly contributes to switching losses during each switching transition.

Compared with conventional MOSFET technology, the seventh-generation GaN platform significantly reduces both parameters, enabling designers to increase switching frequency while maintaining high efficiency, as shown in Figure 1.

Figure 1. Key parameters of latest low-voltage GaN products. Image used courtesy of Bodo’s Power Systems [PDF]

800 V_DC Power Distribution and DC-DC Power Conversion

Traditional data center power architectures are approaching their limits as next-generation AI processors move toward multi-kilowatt power levels. To lower the current, reduce copper losses, and simplify the system, NVIDIA is switching to an 800 VDC power setup that sends high-voltage DC straight to AI racks, which makes it more efficient, boosts power capacity, and creates a better foundation for future AI systems.

To support the increasing current demands of AI GPUs, the input voltage for multiphase power stages is transitioning to 6 volts to improve efficiency and current density. A single-stage 800 V_DC-to-6 V_DC power conversion architecture is considered more efficient and less complex than conventional approaches. However, it also introduces significant challenges, including an extremely high stepdown ratio and massive output current. A target of 97% full-load efficiency under these conditions requires highly optimized converter topologies and advanced power switches.

One of the leading approaches for 800 V_DC conversion is the input-series output-parallel (ISOP) architecture, shown in Figure 2. By connecting converter stages in series at the input and in parallel at the output, ISOP distributes the high input voltage while sharing the output current. This enables the use of lower-voltage switching devices, simplifies transformer design by reducing the required turns ratio, improves efficiency and thermal distribution, reduces output ripple and capacitor requirements, and supports compact implementations.

Solving the Synchronous Rectification Bottleneck

For a high-density 6 kW, 800 V-to-6 V power module, the output current reaches 1000 A, creating a major challenge for synchronous rectification (SR). To handle this current, multiple SR FETs must be connected in parallel, while 1 MHz operation is desirable to reduce transformer size. This creates a significant bottleneck: reducing conduction losses while also minimizing gate driver losses.

To reduce synchronous rectification (SR) losses, a center-tapped transformer secondary is preferred, as shown in Figure 2. In this configuration, only one SR FET conducts the load current at a time, rather than two devices in series, reducing conduction losses. However, the voltage stress across the SR FET doubles, with approximately 2 × V_OUT applied across the device.

Under steady-state operation, the SR FET sees 12.5 V, as shown in Figure 3. Accounting for a 10% variation in the 800 V bus, the voltage increases to 13.8 V, making a 15 V FET inadequate for this application. An 18 V FET, by contrast, provides sufficient voltage margin to meet an 80% derating requirement. The EPC2370 was specifically introduced for 6 V output SR applications and features a 22 V transient voltage rating for additional design margin.

Figure 2. Eight-module ISOP. Image used courtesy of Bodo’s Power Systems [PDF]

Figure 3. Synchronous rectifier V_DS voltage in an 8-module ISOP. Image used courtesy of Bodo’s Power Systems [PDF]

For traditional 48 V power architectures, the input voltage can vary by as much as 20%, reaching up to 60 V. As a result, a 25 V SR FET is better suited to meet the required voltage margin. The EPC2378 was introduced specifically for wide input voltage range intermediate bus converter applications.

In both 48 V and emerging 800 V power architectures, GaN offers the lowest figure of merit, enabling 1 MHz switching while minimizing both conduction and switching losses.

6kW 800 V-to-6 V ISOP Module

A high-density 6 kW, 800 V-to-6 V power module, shown in Figure 4, demonstrates the use of two EPC2370 devices in parallel for each SR FET position within a compact 140 × 120 mm form factor. The module is designed to achieve 98% peak efficiency and 97% full-load efficiency.

Figure 4. 800 V/6 V 6 kW converter. Image used courtesy of Bodo’s Power Systems [PDF]

GaN’s Expanding Role in AI Infrastructure

Lidow estimates that future AI platforms will contain more than $100 worth of power semiconductors for every kilowatt of GPU power. “Around 85% of that power semiconductor content is in applications where GaN is simply the best technology available.”

This trend has led EPC to focus much of its recent product development on AI infrastructure, data centers, and high-performance computing. GaN devices have been deployed in AI server power systems for nearly eight years, and the latest generation, with figures of merit optimized for application-specific requirements, is expected to further expand their adoption.

This article originally appeared in Bodo’s Power Systems [PDF] magazine.