What is a FinFET?

What is a FinFET?

A FinFET is a transistor. Being a transistor, it is an amplifier and a switch. Its applications include home computers, laptops, tablets, smartphones, wearables, high-end networks, automotive, and more.

FinFET stands for a fin-shaped field-effect transistor. Fin because it has a fin-shaped body – the silicon fin that forms the transistor’s main body distinguishes it. Field-effect because an electric field controls the conductivity of the material.

A FinFET is a non-planar device, i.e., not constrained to a single plane. It is also called 3D for having a third dimension.

To avoid confusion, it is essential to understand that different literature uses different labels when referring to FinFET devices.

 

Why Use FinFET Devices in Place of MOSFETs?

Choosing FinFET devices instead of traditional MOSFETs happens for a variety of reasons. Increasing computational power implies increasing computational density. More transistors are required to achieve this, which leads to larger chips. However, for practical reasons, it is crucial to keep the area about the same.

As previously stated, one way of achieving more computational power is by shrinking the transistor’s size. But as the transistor’s dimensions decrease, the proximity between the drain and the source lessens the gate electrode’s ability to control the flow of current in the channel region. Because of this, planar MOSFETs display objectionable short-channel effects.

Shrinking the gate length (Lg) below 90 nm produces a significant leakage current, and below 28 nm, the leakage is excessive, rendering the transistor useless. So, as the gate length is scaled down, suppressing the off‐state leakage is vital.

Another way to increase computational power is by changing the materials used for manufacturing the chips, but it may not be suitable from an economic standpoint.

In short, FinFET devices display superior short-channel behavior, have considerably lower switching times, and higher current density than conventional MOSFET technology.

 

Computing FinFET Transistor Width (W)

The channel (fin) of the FinFET is vertical.  This device requires keeping in mind specific dimensions. Evoking Max Planck’s “quanta,” the FinFET exhibits a property known as width quantization: its width is a multiple of its height. Random widths are not possible.

The fin thickness is a crucial parameter because it controls the short-channel behavior and the device’s subthreshold swing. The subthreshold swing measures the efficiency of a transistor. It is the variation in gate voltage that increases the drain current one order of magnitude.

Figure 1. FinFET dimensions. Image based on King Liu, 2012

 

Figure 1 shows FinFET’s dimensions, where:

• Lg = gate length
• T = fin thickness
• Hfin = fin height
• W = transistor width (single fin)
• Weff = effective transistor width (multiple fins)

 

For double-gate: W = 2 ∙ Hfin

For tri-gate: W = 2 ∙ Hfin + T

Multiple fins will increase the transistor width.

Weff = n ∙ W 

Where n = number of fins

 

FinFET Advantages

• Better control over the channel
• Suppressed short-channel effects
• Lower static leakage current
• Faster switching speed
• Higher drain current (More drive-current per footprint)
• Lower switching voltage
• Low power consumption

 

FinFET Disadvantages

• Difficult to control dynamic Vth
• Quantized device-width. It is impossible to make fractions of the fins, whereby designers can only specify the devices’ dimensions in multiples of whole fins.
• Higher parasitics due to 3-D profile
• Very high capacitances
• Corner effect: electric field at the corner is always amplified compared to the electric field at the sidewall. This can be minimized using a nitrate layer in corners.
• High fabrication cost

 

FinFET Evolution

The foundation of modern electronics is the CMOS transistor. In the last 17 years, CMOS technology has made significant steps in terms of the materials used in manufacture and architecture.

The first great leap was the introduction of strain engineering at the 90 nm technology node. Subsequent steps were the metal gate with a high-k dielectric at 45 nm, and the FinFET architecture at the 22 nm node.

The year 2012 marked the birth of the first commercial 22nm FinFET. Subsequent improvements to the FinFET architecture allowed for improved performance and reduced area. The 3D nature of the FinFET has many advantages, like increasing the fin height to get a higher drive current at the same footprint.

Figure 2 shows the evolution of MOSFET structures: double-gate, tri-gate, pi-gate, omega-gate, and gate-all-around. Double-gate and tri-gate FinFETs are common due to their simple structure and ease of fabrication.

Although the GAA device was proposed before the FinFET, the latter was more comfortable for executing production.

 

Figure 2. MOSFET evolution. Image based on King Liu, 2012

 

What the Future Holds for FinFET Usage

FinFET will not be useful beyond 5nm, as it will not have enough electrostatic control, requiring new architectures for the transistors. However, as technology nodes advance, some companies may decide, for economic reasons, to stay with the same node for longer. Other companies, due to the nature of their processes, will be forced to adopt new technologies.

The gate-all-around (GAA) transistor emerges as the successor to FinFET for significantly scaled process nodes. The GAA structure provides the most significant capacitive coupling between the gate and the channel.

The problem with the GAA FinFET is more about fabrication than leakage. It might help for a couple of nodes, which could mean more than a decade of additional usage. Still, the loss of continuity in manufacturing processes might be significant and expensive.

 

A Review of FinFETs

The innovations in CMOS technology have been obtained through continuous downscaling for higher density, better performance, and low power consumption,   leading to detrimental short-channel effects. Short-channel control is central since it allows shorter channel lengths and lower operating voltages.

Planar MOSFETs encountered tough challenges in the nanometer space, so FinFETs emerged as their replacements. FinFETs block short-channel effects better than planar MOSFETs, enabling transistor scaling.

The planar design doesn’t scale well beyond gate lengths of 30 nm. The gate oxide stops sealing-in the gate control on the source, and the drain is weak. Even with a perfect gate dielectric of thickness zero, the control is only to the region just below the gate. But controlling the leakage current is not possible because it is far away from the gate interface. The off-current goes up and the subthreshold slope degrades, making it difficult to turn off the transistor.

Removing the leakage current is a means for improving electrostatic control. One way of doing it is by employing a multiple-gate structure. This way, the leakage current is always in the channel’s center, and making this channel thinner reduces the current.

The gate-all-around transistor is seen as the future substitute of the FinFET.