Technical Article

What are Depletion-mode MOSFETs?

July 27, 2021 by Lorenzo Mari

The metal-oxide-semiconductor field-effect transistor, or MOSFET, is of much greater commercial importance than the junction FET. MOSFETs are three-terminal devices with many functions, covering signal amplification to digital applications, such as logic gates and registers or memory arrays.

A depletion-mode n-channel MOSFET. Image courtesy of New Jersey Semiconductor Products

The p-n junction diode is the most basic two-terminal semiconductor device. A MOSFET is a three-terminal semiconductor device. Three-terminal devices are more functional than two-terminal ones because they have numerous applications.

The basic principle involved in three-terminal devices is to control the current flowing in one terminal by varying the voltage between the other two.

A three-terminal device allows the making of a controlled source, the starting point for amplifier design. The control signal may also vary the current in the third terminal from 0 A to large values, turning the device into a switch, which is the heart of the logic gates.

Depletion mode devices have an open channel for free carriers to flow between drain and source. Applying a voltage with the proper polarity between gate and source, the carriers in the channel are essentially “depleted.” When the channel between source and drain squeezes or “pinches off,” it rejects additional free carriers to flow through it.

The gate-to-source voltage Vgs regulates the point at which the current between the drain and the source is “pinched-off”. Increasing Vgs in the negative direction in n-channel devices closes the drain-source channel. The same is true increasing Vgs in the positive direction for p-channel devices.

The depletion-mode MOSFET has characteristics analogous to a JFET between cutoff and Idss (saturation). It also has the added feature of operation into the region of positive polarity for Vgs – enhancement mode. The depletion-mode MOSFET, however, is a relatively rare device and is not commonly used.

The MOSFET was the first transistor ever proposed. The idea was patented before 1940, but the knowledge of semiconductor technology and semiconductor physics was insufficient to make suitable devices. Nowadays, the MOSFET is one of the most widely used electronic devices, especially in integrated circuits.

MOSFETs are widely used in integrated circuits for digital applications.

MOSFETs can be manufactured in minimal geometries, require little power to operate, and are relatively simple to produce, making them suitable for use in very-large-scale-integrated (VLSI) digital circuits – microprocessors and memories. MOSFETs also have applications in analog circuits, such as filters and amplifiers.

Configuration of the n-Channel Depletion-mode MOSFET (NMOS)

Figure 1 shows the structure of an n-channel depletion-mode MOSFET.

Figure 1. n-channel depletion-mode MOSFET.

Two heavily doped wells of n-type silicon are formed in a slab of p-type material molded from a silicon base, referred to as the substrate – it is the device foundation. The heavily doped n-type sections act as the source and drain. Interchanging the source and drain terminals does not alter the MOSFET characteristics – it is a symmetrical device.

A very shallow channel of lightly doped n-type material, lying on the surface of the silicon, connects these wells – the channel has the same type of impurity as used for the source and drain.

Over the structure’s surface, there is a layer of insulating silicon dioxide (SiO2), with holes that allow connection with the source and drain terminals through metallic contacts. SiO2 is an insulating layer referred to as a dielectric.

The metal electrode deposited on the oxide over the channel serves as the gate for the transistor. The gate is insulated from the n-channel by the SiO2 layer – there is no electrical connection between the n-channel and the gate terminal.

A very high input impedance is an essential property of the MOSFET, resulting from the presence of the SiO2 layer. Then, the gate current Ig is essentially 0 A for DC-biased designs.

In combination with the semiconductor channel and the insulating dielectric oxide layer, the gate’s metal area shapes a parallel-plate capacitor, with the oxide layer working as the capacitor dielectric.

Sometimes the p-type substrate also has a metal contact, converting the MOSFET into a four-terminal device – the source (S), the drain (D), the gate (G), and the substrate (B). But the substrate is typically lightly doped, and it is not an effective gate – the custom is connecting the substrate to the source terminal internally. Another designation for the substrate is the body.

The name of the metal-oxide-semiconductor field-effect transistor comes from its physical structure: metal for the S, D, G, and B connections; oxide for the SiO2 insulating layer; and semiconductor for the basic structure. Another name for the device is insulated-gate FET, or IGFET, due to the SiO2 insulating layer. The name, however, also applies to devices that do not use metal for the gate electrode – like those using silicon-gate technology.

NMOS with Gate-to-Source Voltage Vgs = 0

Making the gate-to-source voltage Vgs = 0, and applying a drain-to-source voltage Vds, an appreciable drain current Idss (saturated drain current) may flow between drain and source. This effect results from the positive charge at the drain attracting the free electrons of the n-channel. This current is analogous to the one flowing in a JFET’s channel.

Idss is the drain saturation current flowing when Vgs = 0 and Vds is large enough to produce pinch-off.

NMOS with Gate-to-Source Voltage Vgs < 0

Applying a gate-to-source voltage in such a way that will make the gate negative relative to the source, the negative charge will force free electrons out of the channel. It will induce positive charges in the channel through the SiO2 of the gate capacitor – forming a carrier-depletion region in the silicon’s surface at the oxide-silicon interface. Since the current is due to majority carriers – electrons for an n-type material – the induced positive charges make the channel less conductive, increasing its resistance.

The redistribution of charge in the channel, causing an effective depletion of majority carriers, accounts for the designation of depletion MOSFET.

By making the gate negative enough, the depletion region will extend entirely across the channel, joining the depletion region at the p-n junction on the other side of the channel – under this condition, the channel cannot carry current between drain and source. This occurrence is comparable to that of pinch-off occurring in a JFET at the drain end of the channel. The pinch-off voltage is the negative gate value at which the channel becomes nonconductive – usually a few volts.

NMOS with Gate-to-Source voltage Vgs > 0

A depletion-mode MOSFET also works in enhancement mode. The NMOS can operate with a significant positive gate-to-source voltage.

Applying a gate-to-source voltage that will make the gate positive relative to the source attracts additional free electrons into the n-channel. The concentration enhancement of free carriers will lower the channel resistance, and the current will rise above Idss.

Applying a Voltage Between Drain and Source

Applying a voltage between drain and source, making the drain positive relative to the source, will create a voltage drop along the channel with the drain end positive relative to the source end. The positive voltage at the drain end expands the depletion layer at the silicon surface like a negative voltage on the gate.

Figure 2 shows that the channel region nearest the drain end is more depleted due to the voltage drop along the channel than the region near the source end.

Figure 2. Channel depletion with a negative gate voltage.

When the voltage between gate and drain exceeds the pinch-off voltage, the channel becomes pinched-off at the drain end, and the NMOS turns into a constant-current device.

The Drain Characteristic and the Transfer Curve of the NMOS

Figure 3 shows a theoretical volt-ampere (drain) characteristic of the NMOS. Note the depletion and enhancement regions (modes) with Vgs negative and positive, respectively.

Figure 3. Drain characteristic for a depletion-mode NMOS.


Increasing the magnitude of the negative bias Vgs reduces the number of free electrons in the n-channel available for conduction and the drain current value, as seen for Vgs = -1 V, -2 V.

As the gate-to-source voltage increases in the positive direction, the drain current rises faster, as shown by the vertical spacing between the curves for Vgs = 0 and Vgs = +1 V – just a 1 V change in Vgs.

Extending the drain characteristic to high values of Vds will encounter a breakdown region, where the drain current rises quickly. This breakdown mechanism is the avalanche effect in the space-charge region at the drain end of the channel when the voltage drop across the region is substantial.

Figure 4 shows a theoretical transfer curve for an NMOS.

Figure 4. Transfer curve for a depletion-mode NMOS.

Positive gate-to-source voltages “enhance” the number of free carriers in the channel compared to Vgs = 0 V. The Vgs > 0 V zone on the drain characteristic and transfer curve is denoted enhancement region, and between cutoff and Idss, depletion region.

Configuration of the p-Channel Depletion-mode MOSFET (PMOS)

The previous analysis applies in principle also to the p-channel MOSFET or PMOS.

The construction of a p-channel depletion-mode MOSFET is the reverse of that of figure 1. Figure 5 shows an n-type substrate and a p-type channel. The terminals keep the same names, reversing voltage polarities and current directions.

Figure 5. p-channel depletion-mode MOSFET

In a p-channel device, Id flows from source to drain, entering the source terminal and exiting the drain terminal.

The Drain Characteristic and the Transfer Curve of the PMOS

In a PMOS, reverse the currents and voltages in the drain characteristic of figure 3 and the transfer curve of figure 4.

Figure 6 shows the drain characteristics for the p-channel depletion MOSFET. Vds have negative values, Id positive values, and Vgs the polarities exhibited for the new references in voltage polarities and current directions.

Figure 6. Drain characteristic for a depletion-mode PMOS.

The drain current increases from cutoff in the positive Vgs region (depletion mode) to Idss and then rises for more and more negative values of Vgs (enhancement mode).

Figure 7 shows the transfer curve for a PMOS. The polarity inversion in Vgs ends in a mirror image of the transfer characteristics shown in figure 4.

Figure 7. Transfer curve for a depletion type PMOS.

About The Depletion-mode MOSFETs

The depletion-mode MOSFET has a physically implanted channel connecting the source side and the drain side. In an NMOS, the channel is an n-type silicon region connecting the highly doped n-type source and the n-type drain regions on the top of a p-type substrate.

A current Id will flow, making the gate-to-source voltage Vgs = 0 and applying a voltage between drain and source (Vds). When Vds is large enough to produce pinch-off, the drain current that flows is the saturation current Idss.

Vgs controls the channel depth and conductivity.  A positive Vgs enhances the n-channel by attracting more electrons, increasing the channel conductivity – and reducing its resistivity.

A negative Vgs repels electrons from the n-channel, decreasing its conductivity. Operating under negative Vgs depletes the channel of its free carriers – the depletion mode.

The n-channel will be completely depleted of free carriers by increasing Vgs more and more in the negative direction, reducing Id to a value very close to 0 A, even with Vds applied. This Vgs negative value is the pinch-off (Vp) or threshold voltage (Vt) of the NMOS.

The depletion-mode MOSFET can operate in either enhancement or depletion mode. A positive Vgs will make the depletion-mode NMOS work in the enhancement mode, while a negative Vgs will make it run in the depletion mode.

The p-channel MOSFET or PMOS works essentially the same way as the NMOS, except that the currents and voltages in the two types are of opposite polarities.

The PMOS consists of a lightly doped n-type substrate with two highly doped p regions that act as the source and drain. The channel connecting the source and drain is p-type silicon.