Technical Article

InFORMS vs the Trimmed Wirebond Technique to Achieve Uniform Bondline Control Between Substrate and Baseplate

October 21, 2015 by Liam Mills

This article discusses TT Electronics and Hybrid testing the inFORMS and discusses the reliability of this interconnect increases in thermal cycles.

Uneven solder bondline thickness between the substrate and baseplate of an IGBT module causes stress concentration at the thinner sections1 (Figure 1), and can cause delamination and premature failure during the operational life of the module.

To achieve uniform bondline thickness, wirebonds are traditionally stitched and trimmed (to the required bondline) at the corners of the substrate/baseplate (Figure 2), followed by regular preform soldering. This method, therefore, has to factor in the extra costs associated with the additional process steps of wirebonding, trimming, and removal of the wirebond foot.

 

Uneven bondline thickness causing cracks at thinner sections due to stress concentration
Figure 1: Uneven bondline thickness causing cracks at thinner sections due to stress concentration
Trimmed wirebond method to achieve uniform bondline - top view
Figure 2: Trimmed wirebond method to achieve uniform bondline - top view

 

In this working partnership study to eliminate these additional process steps, TT Electronics Power and Hybrid prepared test samples using InFORMS®, which were evaluated at TT Electronics Semelab in-house testing facility, as an alternate technique to maintain uniform solder bondline thickness. InFORMS® are patented solder preforms with a braided metal mesh embedded in the solder preform (Figure 3). The mesh-to-solder ratios (height, area, and volume) are designed to maintain the required bondline and promote good solder wetting. While the solder melts, the mesh does not, allowing for uniform bondline control. Also, since the mesh is present across the entire solder area, there is increased certainty in the uniformity of the bondline thickness across the entire solder area (as compared to 4 corners with the trimmed wirebond technique). 

 

InFORM® with braided metal mesh in the solder preform
Figure 3: InFORM® with braided metal mesh in the solder preform

 

The process of soldering an InFORM® is identical to that of a standard solder preform, providing a drop-in replacement with no process changes (packaging, pick and place, soldering profile) or additional process steps. The InFORM® is available in several alloy compositions – SnAg, SnSb, SnPb, and high-Pb.

For an aerospace application with thermal cycling reliability specifications of -55/+150°C, 1500 passive cycles; failure defined as delamination greater than 50% of substrate/baseplate area; and 200µm-thick desired bondline thickness – two manufacturing techniques were tested.

 

TT Electronics Power and Hybrid Manufacturing Technique 1: Solder Preforms followed by Trimmed Wirebonds

Wirebonds were stitched and trimmed to the required bondline of 200µm at the corners of the substrate/baseplate. A Sn63/Pb37 solder preform was then placed and soldered to the substrate and baseplate. The modules passed the 1500 passive thermal cycles spec with no delamination. Voiding was within the acceptable limits of less than 5% due to optimized process conditions. 

 

500 Thermal cycles with InForm®; no delamination
500 Thermal cycles with InForm®; no delamination
1000 Thermal cycles with InForm®; no delamination
1000 Thermal cycles with InForm®; no delamination
1500 Thermal cycles with InForm®; no delamination
1500 Thermal cycles with InForm®; no delamination
3500 Thermal cycles with InForm®; small delamination following mesh pattern
3500 Thermal cycles with InForm®; small delamination following mesh pattern

 

TT Electronics Power and Hybrid Manufacturing Technique 2: InFORMS® 

A Sn63/Pb37 solder InFORM® with a 200µm embedded mesh was placed between the substrate and baseplate and soldered. The InFORM® was packaged the same as the standard solder preform. The process parameters for soldering InFORM® were identical to those used for soldering standard preforms. The modules passed the 1500 passive thermal cycles specification with no delamination. Voiding with the InFORM® was well within the acceptable limits of less than 5% due to optimized process conditions. It was decided to continue thermal cycling until delamination occurred.

At 3500 thermal cycles, small delamination areas were seen following the mesh pattern in the InFORM®, with the majority of the interconnect remaining intact. Testing was stopped at this point. Figure 4 shows SAM (Scanning Acoustic Microscopy) analysis of the InFORMS® at 500, 1000, 1500, and 3500 thermal cycles.

 

Summary

TT Electronics Power and Hybrid prepared and tested the InFORMS® and saw the reliability of this interconnect increase to at least 3500 thermal cycles which exceeds the typical reliability specification of 1500 passive thermal cycles for -55/+150C. The required bondline of 200µm was maintained throughout. Voiding with the InFORMS® was well under 5% and comparable to the standard solder preforms. No additional steps or process parameter changes were needed when soldering the InFORMS®.

 

About the Author

Liam Mills works as the R&D Manager at TT Electronics PLC since June 2012. Liam holds a Bachelor's Degree in Aerospace, Aeronautical and Astronautical Engineering earned at the University of Liverpool.

Karthik Vijay is based in the UK and is responsible for technology programs and technical support for our customers in Europe. His expertise is focused on engineered solders (power electronics), solder paste, thermal interface materials, and semiconductor-grade electronics materials. Karthik joined Indium Corporation in 2003 and has over 15 years of experience in electronics assembly. He has a master’s degree in Industrial Engineering with a specialization in Electronics Packaging & Manufacturing from the State University of New York, Binghamton. He is an SMTA-certified engineer and earned his Six Sigma Green-Belt certification from Dartmouth College’s Thayer School of Engineering. He is active in several industry organizations, including IMAPS, SMTA, and has presented at several industry forums and conferences nationally and internationally.

 

References

  1. K. Hayashi & G. Izuta, “Improvement of Fatigue Life of Solder Joints by Thickness Control of Solder with Wire Bump Technique”, ECTC 2002, www.cpmt.org/proceedings/

 

This. article originally appeared in the Bodo’s Power Systems magazine.