Technical Article

Improving Efficiency and Reducing Size of Low-Power AC/DC Conversion

June 22, 2022 by Igor Spinella, Eggtronic

In this article, Eggtronic CEO Igor Spinella considers conventional low-power conversion architectures based on quasi-resonant (QR) and active clamp flyback (ACF) topologies in the context of high-performance AC/DC converters, and introduces a novel architecture that guarantees ZVS from light load to full load.

Applications ranging from fast chargers and travel adapters to power supplies for loudspeakers and smart home assistants rely on low-power (sub-100 W) AC/DC conversion. A fundamental point when choosing the power conversion architecture is the extent to which it delivers zero voltage switching (ZVS) as this has a significant impact on efficiency, EMI performance and reliability. Not all conventional topologies are able to reach ZVS, and none has yet been able to deliver ZVS at light load.

Any piece of electronic equipment that plugs into a wall outlet requires some form of AC/DC converter to rectify the voltage and reduce it to the lower level that the equipment requires. Many modern devices we find in our homes and offices fall into the low-power category, requiring less than 100 W of power. In fact, with the exception of appliances, the majority of devices that we have in our homes are likely to be classified as low-power.

In some cases, such as computer monitors or battery chargers, the AC/DC converter will be embedded in the product itself. However, many devices use a dedicated external power supply - including smart home assistants and computer peripherals such as disc drives, all of which require power while in use. In addition, AC/DC conversion is fundamental to the adapters used to charge mobile phones, tablets and other portable devices.

While the low power nature of these applications might imply that efficiency is not a huge concern, nothing could be further from the truth. Given the billions of these devices that are in use and that are often left plugged in 24 / 7 the impact on global energy consumption and subsequent emissions is significant. Making AC/DC converters more efficient is, therefore, at the top of the power engineer’s design agenda.


Topologies and Techniques for Low-Power AC/DC Conversion

Low-power AC/DC converters rated below 75 W are generally not subject to power factor correction (PFC) requirements as their effect on the mains grid is considered to be minimal. This simplifies the design and reduces component count – both of which are ideal for these tiny power solutions.

The flyback topology is extremely popular in low-power designs due to its versatility, performance and simplicity. This topology has been in use for over 70 years and generally consists of a primary-side MOSFET, output (secondary) rectifier diode, output capacitor and flyback transformer – as well as a few other minor components.

Power designers are constantly seeking to improve topologies to enhance efficiency or performance or, ideally, both. As a result, the quasi-resonant (QR) flyback architecture has become very popular due to its ability to reduce switching losses. This is achieved by lowering the drain-source voltage of the primary MOSFET before the turn-on pulse which has the effect of reducing the peak current and switching frequency, ensuring that the MOSFET turns on at the first ‘valley’.

The efficiency gains from QR operation are primarily realized in full load conditions. However, the hard-switching nature of this topology means that at light loads, efficiency is generally much lower.

The QR flyback design can be further improved by the implementation of zero-voltage switching (ZVS). In a normal QR flyback design the MOSFET is switched in a ‘valley’ which implies that the drain source voltage (VDS) is at a minimum, but not necessarily zero. By implementing ZVS (or soft switching), VDS falls to zero (rather than just a minimum) before the MOSFET is switched which eliminates any overlap between the voltage and current, thereby minimizing losses. This also reduces EMI, an additional benefit that allows designers to meet stringent EMC regulations more easily.

A further development is the active clamp flyback (ACF) topology that differs from conventional flyback designs in that it re-uses the energy stored in the transformer’s leakage inductance that would have been dissipated in a passive clamp snubber resistor. Delivering this ‘recycled’ energy to the load improves converter efficiency and significantly reduces the peak voltage across the MOSFET during turn-off.

Additionally, the QR ‘valleys’ in an ACF design are significantly lower, often achieving near-ZVS operation, thereby delivering the reduced switching losses and enhanced EMI.


Improving and Extending ZVS Performance

A new approach to flyback conversion with the ability to further enhance performance, efficiency and reliability is QuarEgg®, an innovative and proprietary power architecture developed by Eggtronic that is specifically intended for sub-100 W AC/DC designs. This new architecture significantly improves the efficiency and reduces the size of AC/DC converters that would normally have been based upon ACF and QR flyback topologies. Unlike other approaches, the architecture operates with ZVS under all load conditions to give very flat efficiency curves. Typical efficiencies achieved are up to 95% at full load and up to 92% at light load and, when in standby mode, a QuarEgg-based design consumes less than 18 mW.


Figure 1. QuarEgg shows a significant efficiency improvement over a generic QR flyback converter right across the load range. Image used courtesy of Bodo’s Power Systems


Figure 2. Simplified schematic of the QuarEgg topology. Image used courtesy of Bodo’s Power Systems


Compared to a generic QR flyback topology, the new approach adds an auxiliary winding to the main transformer along with a flying capacitor and a low-voltage, low-cost MOSFET connected in a forward configuration on the low side. However, the elimination of a high-voltage, high-side clamping MOSFET reduces overall component count and improves reliability. The main QuarEgg controller is on the secondary side of the converter so as to enhance regulation of the output voltage.

The auxiliary MOSFET is primarily included as a means of actively forcing the ZVS conditions for the primary power MOSFET across all load conditions. While the converter is switching, the secondary side controller senses the VDS of the primary MOSFET via the auxiliary winding. When each crest occurs, the auxiliary MOSFET turns on and discharges the drain node so VDS becomes zero, thereby ensuring a ZVS turn-on of the primary MOSFET.

The corresponding waveforms are shown below.

The new approach is suitable for use with all types of MOSFET switching devices, including legacy silicon and wide bandgap (WBG) materials such as gallium nitride (GaN) and silicon carbide (SiC). With improved performance compared to conventional ACF and QR topologies, QuarEgg-based power converters are up to seven times more efficient and three times smaller than traditional silicon converters and up to three times more efficient and twice as small as already high-performance GaN converters.

To support designers using Eggtronic technology, a range of development boards, integrated power controllers and proprietary magnetic components - as well as detailed technical support - are available.


Figure 3. Waveforms for the QuarEgg topology. Red: VDS of primary MOSFET; Green: Vg of auxiliary MOSFET; Blue: Vg of primary MOSFET. Image used courtesy of Bodo’s Power Systems



Efficiency from no load to full load is an increasingly important consideration for low-power AC/DC power supplies, chargers and adapters that are likely to be left plugged in 24 hours a day, seven days a week. Until now, many designs have been based upon the flyback topology that has been in use for decades, albeit with more recent enhancements such as QR, ACF and ZVS.

As a member of Eggtronic’s EcoVoltas® family, QuarEgg is specifically developed to deliver smaller, higher efficiency power conversion and help engineers to meet performance, cost, size, weight and sustainability goals.

By actively forcing ZVS operation, the new architecture not only increases efficiency but flattens the efficiency curve to address poor performance at light loads. The technology also allows a reduction in components, further improving power density and reliability.


This article originally appeared in Bodo’s Power Systems magazine.