MagnaChip Offers 0.18 & 0.35µm Advanced Bipolar CMOS-DMOS Process Technology

November 25, 2008 by Jeff Shepard

MagnaChip Semiconductor Ltd. announced the availability of its 0.18 and 0.35µm aBCD (Advanced Bipolar CMOS-DMOS) process technologies for foundry customers. The MagnaChip aBCD process technologies is said to represent the latest solutions of ASTech, or Application Specific Technology to meet the specialized customer needs for specific applications. The flexibility of two aBCD process nodes, 0.18 and 0.35µm, allow our customers to address a wide range of applications.

The 0.18µm aBCD process is suitable for complex, highly integrated power management ICs, such as those found in mobile handsets. The 0.35µm aBCD, with higher voltage and power capabilities, is well suited for applications such as LED driver IC, for LCD TVs and Notebooks. MagnaChip states that it has combined the cost and device performance of smaller chips with better leakage characteristics, more uniform & higher isolation breakdown voltage and improved latch-up immunity. First products from the new aBCD processes are sampling now. Mass production will begin in the first half of 2009.

Namkyu Park, Vice President of Technology Engineering of MagnaChip’s Semiconductor Manufacturing Services, commented, "MagnaChip’s aBCD process technology has adopted a DTI (Deep Trench Isolation) process, rather than the conventional junction isolation process in order to satisfy reliability and cost requirements. Within the aBCD process, the DMOS device was optimized for low Rsp (Specific Ron), enabling improved drive capability for power management ICs. With these features, we have designed a robust application-specific technology for foundry customers, a departure from traditional offerings."

With DTI technology, the MagnaChip aBCD process is said to achieve cost reduction by dramatically reducing the high voltage transistor pitch, up to almost half when compared to normal junction isolation. Better product reliability and latch-up characteristics are achieved by locating the deep trench isolation between high voltage junctions prone to latch-up, eliminating one of the biggest concerns in power management IC design. Better device performance, such as high switching speed, is achieved by removing parasitic resistance and capacitance between high voltage wells. Lastly, much lower leakage characteristics as well as more repeatable and higher breakdown voltage characteristics than junction isolation, are achieved. Both technology nodes are fully voltage scalable enabling designers to apply EDMOS or LDMOS devices at various voltage levels. Additionally, MagnaChip offers process options such as N/P-EDMOS, N/P-LDMOS, low voltage & high voltage BJT, 1~4fF MIM Capacitor, 0.2~10kΩ Resistor, Schottky Diode, Zener Diode, low voltage & high voltage Diode, OTP (One Time Programmable memory) EEPROM, SRAM, and native CMOS.

Channy Lee, Executive Vice President and General Manager of MagnaChip’s Semiconductor Manufacturing Services, commented, "MagnaChip has been making substantial efforts to develop industry leading advanced BCD process technology. We are very pleased to finally announce the offering of our revolutionary 0.18 and 0.35µm advanced BCD process technology to better meet the increasing demand for high volume and high growth target applications such as mobile handsets and LCD TVs. We expect to expand our application specific process portfolio to automotive, power over ethernet and high performance audio amplifier applications as we continually seek to understand and address our foundry customers’ needs going forward."