EEPower

Simulation Solution for Optimizing Switching-Power Loss


New Products Aug 08, 2016 by Jeff Shepard

After working through the Cadence® Connections Program on an integration with the Virtuoso® Analog Design Environment and the Spectre® simulation platform, Magwel is announcing a solution for incorporating detailed and accurate models for power devices and converter circuits into the Cadence simulation flow, enabling accurate optimization of the key performance parameters of converter circuits. Adding transient modeling to its line of power transistor modeling tools, Magwel now offers integration into the Cadence Spectre simulation platform and Virtuoso Analog Design Environment for circuit simulation with comprehensive models that include non-uniform device switching effects.

Designing and optimizing circuits like buck and boost converters, dc-dc converters of all sorts and switching power supplies entails minimizing switching-power loss and reducing dead-time and shoot-through currents. Large power transistors exhibit non-uniform 3D current flows and current crowding due to their wide complex metal structures. Moreover, propagation delays in the complex gate networks cause non-uniform turn-on/off of the active devices, which can cause current crowding and device breakdown.

Designers and layout engineers often try to estimate layout parasitics with approximate lumped element models. As a result, designers have to add extra design margins to avoid shoot-through currents leading to less optimal and lower performance designs. The integration addresses these requirements, removing the guesswork from the process.

“The Cadence Virtuoso Analog Design Environment together with the industry-leading high-precision Spectre circuit simulation platform allows comprehensive simulation of power converter designs, including process corners and custom test benches. We are excited to add to these capabilities fine-grain transient modeling of power device circuits,” said Magwel CEO, Dündar Dumlugöl.