EEPower

Fairchild Introduces Dual MOSFET To Increase Power Density In Synchronous Buck Applications


New Products Jul 08, 2009 by Jeff Shepard

Fairchild Semiconductor states that it is bringing designers an industry- leading, dual MOSFET solution that delivers higher efficiency and power density for notebooks, netbooks, servers, telecom and other dc-dc designs. The FDMC8200 integrates an optimized control (high-side) and synchronous (low-side) 30V N-Channel MOSFET into one 3 x 3mm MLP module – all designed with Fairchild’s advanced-performance PowerTrench® 7 MOSFET technology.

This technology is said to yield an exceptionally low RDS(ON), total gate charge (QG) and Miller Charge (QGD) – enhancements that result in high efficiency by minimizing conduction and switching losses. The FDMC8200 typically features an RDS(ON) of 24mΩ on the high side and 9.5mΩ on the low side. It can deliver over 9A of current for mainstream computing applications, and the optimized pinout and footprint provides ease of layout and routing, simplifying design.

The FDMC8200 is said to address key design challenges of dc-dc applications, space conservation and thermal performance, through its advanced packaging technology and proprietary PowerTrench 7 process. The compact and thermally-enhanced 3 x 3mm Power33 MLP package, and PowerTrench 7 technology, is said to inherently offer high power density, high power efficiency and excellent thermal performance.

This dual MOSFET is part of a comprehensive portfolio of advanced MOSFET technology that provides a wide range of breakdown voltages and state of the art packaging technology for efficient power management and low thermal resistance. This portfolio includes the FDMS9600S and FDMS9620S, integrated FET modules that also significantly reduce board space and enable synchronous buck designs to achieve higher conversion efficiency.

The units are priced (each, 1000 pcs.): US$ 0.50.

Learn More About