Unlocking the Potential of Multilevel Power Conversion Topologies
This article explores the design challenges of a Flying Capacitor Multilevel (FCML) Totem-Pole Power Factor Correction (PFC) circuit.
This article is published by EEPower as part of an exclusive digital content partnership with Bodo’s Power Systems.
Multi-level AC-DC converters can be more compact for a given power level because the ripple frequency will be higher, requiring smaller inductors and smaller input filters than other topologies need. Historically, the widespread adoption of multilevel topologies has been hindered by the complexities and costs associated with their control. However, recent advancements in digital signal controller (DSC) technology and sophisticated control strategies are paving the way for broader implementation, unlocking the full potential of multilevel converters, making them viable solutions in environments with stringent power demands.

Image used courtesy of Adobe Stock
This article explores the design challenges of a Flying Capacitor Multilevel (FCML) Totem-Pole Power Factor Correction (PFC) circuit. These converters employ multiple voltage levels to reduce voltage stress on each switch and enhance the quality of the output waveform. This is achieved through the use of capacitors that “fly” between different voltage levels, creating intermediate voltage steps. These capacitors play a crucial role in balancing voltage across switches and minimizing overall harmonic distortion, which can also lead to reduced electromagnetic interference (EMI). The intermediate voltage levels also allow for the use of lower voltage components, improving overall efficiency.

Figure 1. Switching states cause voltage drift across capacitors, demanding precise control algorithms. Image used courtesy of Bodo’s Power Systems [PDF]
As the FCML circuits operate, the various flying capacitors are charged and discharged based on the switching states at that point in time. Not all capacitors are involved equally in every switching transition, leading to unequal charge/discharge cycles and natural voltage drift that must be compensated for by the controller.
Implementing FCML Topology
Implementing the FCML topology requires sophisticated control algorithms to manage the multiple switches, flying capacitors and totem-pole configuration. These algorithms ensure proper voltage balancing, minimize harmonic distortion and maintain system stability. Advanced DSCs0), such as Microchip’s dsPIC33A family, are particularly wellsuited for this application. In an FCML PFC topology, the controller must accurately sample the voltages on the flying capacitors, which is crucial for maintaining voltage balance, supply stability and overall power efficiency. Imbalances can compromise performance, reduce efficiency and even damage components.

Figure 2. The dsPIC hardware and tools ecosystem streamlines FCML control algorithm development and deployment. Image used courtesy of Bodo’s Power Systems [PDF]
Multilevel converter topologies demand advanced control strategies to coordinate the growing number of switches and voltage levels. A key challenge is maintaining voltage balance across each flying capacitor; any imbalance can result in overvoltage conditions and potential damage to components. In an ideal ( n )-level FCML circuit, the average voltage across each flying capacitor is defined by ( V_c = V_{dc}/(n - 1) ).
Increasing the number of levels in an FCML enhances harmonic performance by lowering total harmonic distortion (THD) and producing an output waveform that more closely resembles a pure sine wave. While efficiency can also benefit from additional levels, there is a threshold beyond which further increases introduce greater losses and system complexity, potentially diminishing overall efficiency. These losses stem from both switching events and capacitorrelated factors such as leakage currents and equivalent series resistance (ESR).
As the system’s complexity grows, so does the challenge of maintaining stability, particularly due to the interactions among multiple control loops. Additionally, the higher number of switches in multilevel topologies makes the management of switching losses more demanding. Effective control of these switches is therefore essential to achieving and sustaining high power efficiency in FCML systems.
Control Strategies
Over the years, many control strategies have been developed to address these issues. Traditional methods, feedback control or redundant switching state selection, typically operate based on instantaneous measurements or simple rules. While these approaches can be effective, they may struggle to maintain precise capacitor voltage balance under rapidly changing load conditions, disturbances or in systems with significant delays and nonlinearities. They often rely on local information and do not account for the future impact of current control actions, which can lead to slower response times and less optimal performance, especially in complex multilevel topologies.
Overall, while multilevel topologies can offer many benefits such as higher power density, improved efficiency and reduced harmonic distortion, they also introduce significant challenges in control. For instance, the frequency of the system’s poles based on current operating conditions often varies more with multilevel topologies than they do with traditional topologies. Implementing adaptive control strategies that adjust controller parameters in real-time based on system dynamics can help compensate for pole movement, ensuring that the system remains stable and performs as desired under all conditions.
Feed-forward control is often used in conjunction with feedback control to improve the performance and stability of FCML topologies. Feed-forward control anticipates the effect of known disturbances, such as changes in the input voltage or load conditions, and compensates for them before they affect the system output. This can improve the dynamic response of the system and it helps in maintaining stable operation and reducing transient deviations. By providing a proactive adjustment based on the input conditions, feed-forward control can enhance the overall stability of the PFC circuit. By adjusting the control signals in advance, it reduces the burden on the feedback loop and minimizes the impact of these disturbances on the output. Feed-forward control can help in achieving a near-unity power factor by adjusting the duty cycle of the switches based on the input voltage, ensuring that the input current remains in phase with the input voltage.
Another control strategy that is often used in FCML designs is redundant switching state selection. These designs inherently offer multiple switching combinations— known as redundant states—that can produce the same output voltage while affecting different capacitors. By intelligently selecting among these states, the controller can actively charge or discharge specific capacitors, thereby maintaining their voltages within the desired range. This approach is highly effective and leverages the natural redundancy of the FCML topology.
Predictive and model-based control techniques, such as Model Predictive Control (MPC) or Finite Control Set MPC (FCS-MPC), have also gained traction. These methods use mathematical models of the converter to predict future capacitor voltages and optimize switching actions accordingly, rather than simply reacting to present or past errors. By minimizing a cost function that includes capacitor voltage deviation, predictive control can deliver excellent performance, especially under dynamic operating conditions.
In contrast, MPC uses a mathematical model of the FCML to predict the evolution of capacitor voltages and other system states over a defined future time horizon. At each control step, MPC evaluates multiple possible switching sequences and selects the one that minimizes a cost function—typically incorporating capacitor voltage deviations, switching losses and output quality. This predictive approach enables the controller to proactively manage capacitor voltages, ensuring they remain balanced even in the presence of disturbances or dynamic operating conditions.
dsPIC Famuly of DSCs
The dsPIC family of DSCs has emerged as a leading platform for implementing Flying Capacitor Multilevel (FCML) Totem-Pole Power Factor Correction (PFC) topologies, owing to its combination of high-performance processing, advanced analog integration and flexible control peripherals. Notably, the dsPIC33A series features high-speed, low-latency analog-to-digital converters (ADCs) that enable precise, real-time sampling of flying capacitor voltages. This is an essential requirement for maintaining voltage balance, supply stability and optimal power efficiency in FCML systems. With 12-bit ADCs capable of 40 million samples per second throughput, these controllers provide the rapid, accurate measurements necessary for advanced control algorithms.
The dsPIC33A’s powerful digital signal processing core supports the execution of complex feedback and feed-forward control strategies with minimal latency, ensuring fast transient response and high efficiency. Dual 72-bit accumulators enable both 32-bit and 16-bit fixed-point digital signal processing (DSP) operations, delivering exceptional precision for demanding control applications.
Integrated high-resolution pulse-width modulation (PWM) peripherals offer granular control over multiple switches and voltage levels which is an essential feature for multilevel converter topologies. With Fine Edge Placement (FEP) PWM resolution as fine as 78 picoseconds, the dsPIC DSC facilitates precise switching, which helps minimize losses and maximize system efficiency. Additionally, a robust interrupt system and versatile timers further enhance the controller’s ability to implement adaptive, real-time control strategies, ensuring reliable performance even under rapidly changing operating conditions.
Complementing its hardware capabilities, the dsPIC ecosystem includes comprehensive software and development tools that streamline design, prototyping and debugging. This synergy of advanced hardware features and robust software support empowers engineers to efficiently develop, test and refine control algorithms, making the dsPIC DSC an ideal solution for unlocking the full potential of FCML power conversion topologies in modern, high-efficiency power systems. As technology continues to advance, the potential for multilevel power conversion topologies to revolutionize power electronics becomes increasingly apparent, promising a future of more efficient and more compact power solutions.
This article originally appeared in Bodo’s Power Systems [PDF] magazine.
