Technical Article

DC-DC Power Converters for Offshore Wind Farm Integration

May 04, 2020 by Laurent Chedot

In the following, an example of a study that has been held in the SuperGrid Institute real-time platform is presented. It deals with Power Hardware In-the-Loop (PHIL) validation of DC-DC power converter for offshore wind energy integration.

Real-time simulation gains more and more place in the academic field as well as in the industrial one. It helps engineers and researchers to reduce time development of some concepts/ideas and allows their validations especially during test cases that are difficult to reproduce in real life. SuperGrid Institute with its real-time platform makes available to its clients all the necessary facilities including resources and support to ensure such experiments in optimal conditions.

 

In the following, an example of a study that has been held in the SuperGrid Institute real-time platform is presented. It deals with Power Hardware In-the-Loop (PHIL) validation of DC-DC power converter for offshore wind energy integration.

DC Collector Concept 

SuperGrid Institute investigates several architectures for an optimal offshore windfarm integration. One proposal configuration is the offshore DC collector concept, where the standard MVAC grid of the windfarm (Figure 1 (a)) is replaced by its MVDC counterpart. As a result, two new DC-DC converters are required to step up the voltage to MVDC levels at the wind turbine generators (WTG) and to HVDC levels at the offshore platform (Figure 1 (b)).

 

Figure 1: Offshore wind farm with (a) AC collector and (b) DC collector
Figure 1: Offshore wind farm with (a) AC collector and (b) DC collector

 

Following this cost-effective architecture, SuperGrid Institute has proposed a new modular DC/DC converter to step up the voltage inside the WTG to MVDC levels of ±50 kV in order to form the offshore DC collector grid. The basic building block of this converter is the Triple Active Bridge (TAB) cell (see Fig 2 (b)) with a voltage conversion ratio of 4 kV to 8 kV and a nominal power of 800 kW. Using the input parallel output series (IPOS) connection of 12 cells results in the required DC-DC converter that allows to step up the voltage to ±50 kV and a total power rating of 10 MW.

Before going to the development of the full-scale prototype, it has been decided to build a Small Scale Mock-Up (SSMU) for this topology. Thanks to SuperGrid Institute real-time platform, power hardware in the loop simulation has been used to:

  • Validate the concept of this converter;
  • Prototype a control system for the topology and its real-time implementation;
  • Test the converter behavior with its environment (other converters, cables, wind farms…).

 

Small Scale Mock-Up (SSMU) Components Sizing

A small scale mock-up of the power converter was developed in order to validate the topology and its control (see Figure 2). Two constraints were taken into account in order to satisfy the dynamic behavior as close as possible between the Full-Scale Mock-Up and the small scale one. To do so, first, the control interface was kept identical. Second, the methodology of scaling used for the power circuit was to keep the same electrostatic and magnetic time constants between the SSMU and the FSMU. The electrostatic time constant is used to size the capacitances where the magnetic time Tm, is used to size the leakage inductance of the transformer.

 

Figure 2: (a) Schematic diagram of the Small Scale Mock-Up “SSMU” (b) Illustration of one cell of the SSMU
Figure 2: (a) Schematic diagram of the Small Scale Mock-Up “SSMU” (b) Illustration of one cell of the SSMU

 

Power Hardware in the Loop (PHIL) Test Bench

Once the SSMU elements are designed and the global topology is built, the next step will be its real-time testing. SuperGrid Institute has developed a real-time platform to ensure such tests. The latter includes all the necessary facilities and expertise to perform these real-time tests:

  • Several real-time targets with more than 30 activated cores allowing to simulate large AC/DC grids including generators, transformers, converters, breakers...;
  • FPGA carts programming with Inputs Outputs management;
  • Rapid Control Prototyping (RCP) for the converter control system as well as for grid protection relies;
  • Two power amplifiers adapted to different configurations and cover large bandwidth frequencies.

 

For the corresponding study “OWF application”, the SSMU is tested with Power Hardware in the Loop (PHIL) environment. This experience consists in combining a simulated environment (AC/DC grids) on a real-time target with real hardware, the SSMU in this case, see Figure 3. To achieve this purpose, analog inputs and outputs are used to exchange signals between the real-time target and the device under test (SSMU), as illustrated in Figure 3. In addition, two amplifiers are required to adapt current and voltage levels between the simulation and the SSMU.

 

Figure 3: Signals exchange interface between the device under test and the real time simulation

Figure 3: Signals exchange interface between the device under test and the real-time simulation

 

The interface of the PHIL setup is presented in Figure 3 where the exchange signals are illustrated. It has been considered that the input current Idc,LV is imposed by the wind turbines and the voltage bus Vdc,MV is controlled at the point of common connection (PCC). Thus, Idc,LV and Vdc,MV are the signals sent from the real-time system (RTS) to the SSMU. At the same time, Vdc,LV and Idc,MV are measured at SSMU terminals in order to send them back to the real-time simulation. Therefore, amplifiers must be able to source and sink current and voltage which is possible with the available power amplifiers, see Figure 4.

 

Figure 4: Experimental PHIL test bench
Figure 4: Experimental PHIL test bench

 

Power, current or voltage control strategies can be applied for this topology. However, in this work, the voltage regulation is selected because of the architecture specification. The fact that the input current Idc,LV is imposed by the wind turbines forces the LVDC/MVDC converter to regulate the input voltage Vdc,LV. Likewise, the output voltage Vdc,MV is imposed by MVDC/HVDC converter, so balancing the output capacitors needs to be ensured by the SSMU control.

The control system of the SSMU is designed using Matlab/Simulink software which is suitable software for control design. The time constant of Vdc,LV regulation has been set to 1ms while the time constant for the regulation of the balancing MV side capacitors has been set to 3ms. Once the control is built and validated with offline simulation, a complied control C code is generated for its real-time implementation in the control target.

For PHIL experiments, engineers need to think about all the events that the converter can deal with. It includes all protections to save facilities against overcurrent/overvoltage as well as all the operational processes started from the startup to the showdown of the test bench. This necessitates updating the initial control system in order to meet these new requirements.

 

Figure 5: Experimental results during a sudden stop of the OWF connected to the SSMU: total LV DC voltage (Vdc_LV), total MV DC voltage (Vdc_MV), the 8 LV capacitors DC voltages (Vcap_LV), the 16 MV capacitors DC voltages (Vcap_MV), the total LV DC current (Idc_LV), the MV DC current (Idc_MV), the DC LV current for each of the 4 stages (Istage_LV) and the 8 phase-shifts (Delta)
Figure 5: Experimental results during a sudden stop of the OWF connected to the SSMU: total LV DC voltage (Vdc_LV), total MV DC voltage (Vdc_MV), the 8 LV capacitors DC voltages (Vcap_LV), the 16 MV capacitors DC voltages (Vcap_MV), the total LV DC current (Idc_LV), the MV DC current (Idc_MV), the DC LV current for each of the 4 stages (Istage_LV) and the 8 phase-shifts (Delta)
Figure 5: Experimental results during a sudden stop of the OWF connected to the SSMU: total LV DC voltage (Vdc_LV), total MV DC voltage (Vdc_MV), the 8 LV capacitors DC voltages (Vcap_LV), the 16 MV capacitors DC voltages (Vcap_MV), the total LV DC current (Idc_LV), the MV DC current (Idc_MV), the DC LV current for each of the 4 stages (Istage_LV) and the 8 phase-shifts (Delta)

 

Once the startup sequence is successfully achieved (performed exactly as for real projects), a scenario that can be tested is a sudden stop of the OWF connected to the SSMU. The experimental results for this test are presented in Figure 5. It can be observed that this event creates a small voltage dip on the low voltage bus which is quickly corrected. After that, both LV side and MV side capacitors voltages are balanced. It is worth noticing that the MVDC collector, Vdc, MV. The DC currents, Idc, LV, Istage,LV and Idc,MV, are all very smooth even if there is a dip on the LV bus since the wind turbine is considered as a perfect current source and not a power source for now.

 

Conclusion

The PHIL approach becomes essential when validating the innovative power converter concepts where the HIL is pushed to their limits. Thanks to the small scale mock-up the converter topology and controls can be easily validated within the power system environment. This approach minimizes the converter integration risks and reduces product development time and cost. As an example, some sequences as the converter energization may be omitted while designing the converter. The fact to think about its integration in an overall system early in the design process when considering PHIL helps to identify these aspects.

The PHIL validation of a DC-DC power converter for an offshore wind farm was presented. The selected case study was the full DC wind farm architecture with bidirectional DC-DC power converters. A simulation model of the complete wind farm was developed and implemented in a real-time target. A small scale mock-up of the wind turbine DC-DC converter was developed. The converter mock-up was implemented in a PHIL test bench and the normal operation was demonstrated with a simplified model of the system. Some further investigations are envisaged using the real-time simulation model of the complete wind farm in normal and degraded operating conditions.

 

About the Authors

Ahmed Zama received his Bachelor's Degree in Electrical Engineering at National PolytechnicSchool and Master's Degree in Electrical Energy at Grenoble Institute of Technology. He is a research engineer and Ph.D. student at SuperGrid Institute.

Laurent Chedot received his Electromechanic-Engineer degree at the University of Technology of Compiègne, then Master's Degree in Electrical Engineering at Pierre and Marie Curie University, and Ph.D. in Electromechanic at the University of Technology of Compiègne. He worked as a research group leader - SuperGrid Modelling and Simulation at SuperGrid Institute.

Luc Bourserie received his General Engineer Degree in Energie at Ecole centrale de Lyon at SuperGrid Institute. He manages electrical energy at Volvo Group Trucks Technology.