Texas Instruments Intros New SoC Family at CES to Scale Automotive AI

At CES 2026, Texas Instruments (TI) expanded its automotive and embedded processing roadmap by introducing its TDA5 SoC family. Building on more than a decade of Jacinto processors, TI sees TDA5 as offering a step change in compute density and system integration without sacrificing software continuity with prior TDA generations.

Texas Instruments’ Roland Sperlich (left) with All About Circuits contributor Jake Hertz (right) at CES 2026. All About Circuits image.

All About Circuits had the chance to meet with Roland Sperlich, Vice President and General Manager for Processor Products at Texas Instruments, during CES 2026 to learn about the new processor firsthand.

Architectural Changes from TDA4 to TDA5

The TDA5 brings TDA4’s tens of TOPS into the hundreds and ultimately four-digit TOPS territory while still retaining a heterogeneous architecture for deterministic behavior. Sperlich put it all into perspective.

"My biggest TDA4 device was 32 TOPS. My middle-range TDA5 device is already 400 TOPS, and we can scale to 1200 TOPS. And if the market needs more, chiplets let us extend that without starting over.”

To that end, the family integrates up to eight Arm Cortex-A720AE application cores for high-level operating systems along with up to six Arm Cortex-R52+ real-time CPUs that support lockstep operation. TI also includes multiple dual Cortex-M55 subsystems for system management and functional isolation.

The company’s multi-tier CPU structure lets OEMs consolidate workloads that previously required multiple ECUs into a single device. Importantly, the system can concurrently execute cockpit visualization, sensor fusion, gateway functions, and safety monitoring without competing for the same execution resources. According to TI, this partitioning directly supports mixed ASIL-D and ASIL-B on the same device.

AI Acceleration and Deterministic Compute

The heart of TDA5’s performance scaling is TI’s latest-generation C7 neural processing unit. Depending on configuration, the device integrates up to four C7 NPUs, delivering as much as 400 TOPS per device and scaling to 1,200 TOPS within the family. At the same time, TI emphasizes power efficiency above 24 TOPS/W, which means these performance levels come without external accelerators or aggressive thermal solutions .

Central computing architecture in a software-defined vehicle. Image used courtesy of Texas Instruments.

In contrast to GPU-centric inference approaches, the C7 NPU targets application-specific acceleration for automotive workloads such as convolutional neural networks and emerging in-vehicle language models. “This device is only going to be used in a car or a tractor or a robot” said Sperlich, “It’s not something you turn into a general-purpose GPU. Because it’s application-specific, we can optimize the architecture much more aggressively for those use cases.”

TI complements the NPU with extensive on-chip memory to reduce dependence on external LPDDR accesses. Sperlich told us ““Next to the DSPs and GPUs, we actually put a lot of memory inside the device so you don’t need to access the DDR pipe. That reduces latency, and in a car, latency really matters because cars need to brake when they need to brake.”

Vision, Radar, and Sensor Fusion Pipelines

TI also imbued TDA5 with a dedicated vision and imaging subsystem designed to handle high sensor counts without external preprocessing. The platform supports up to sixteen camera inputs through CSI-2 interfaces and includes hardware accelerators for dense optical flow and stereo disparity. These engines offload classical computer vision workloads from general-purpose cores to free compute headroom for AI inference and decision logic.

Texas Instrument’s automotive technology display at CES 2026. All About Circuits image.

Still, radar processing remains a focus for TI. TDA5 pairs with TI’s latest 8-by-8 and cascaded radar front ends to reach long-range perception beyond 300 meters under adverse lighting or weather conditions. Meanwhile, the SoC’s DSP and NPU resources unlock real-time fusion of radar and camera data to improve object classification confidence and reduce false positives.

Graphics, Display, and In-Vehicle Networking

For visualization and HMI, TDA5 integrates an Imagination DXS-family GPU and a multi-pipeline display subsystem capable of driving up to four independent 4K60 displays. Support for eDP 1.5, DisplayPort 2.1, and DSI interfaces allows the same silicon to scale from entry-level clusters to premium multi-screen cockpits without architectural changes.

To support the industry trend toward zonal and software-defined vehicles, TDA5 includes an integrated Ethernet switch with up to eight external ports and native support for 10BASE-T1S, along with MACsec at line rate on each port. A dedicated network processing accelerator handles packet movement and switching functions, which reduces CPU load and improves determinism for time-sensitive data.

Software Continuity and Virtual Development

Finally, TI believes that TDA5’s software strategy is its major differentiator. The company designed the architecture to preserve compatibility with TDA4 software assets, meaning OEMs can scale performance without rewriting perception or control stacks. As Sperlich puts it, “We want customers using TDA4 to still move quickly. The old software is still there. TDA5 is a superset, so customers don’t lose all the engineering effort, software investment, and quality work they’ve already put in.”

The TI/Synopsys Virtualizer block diagram. Image used courtesy of Texas Instruments.

In parallel, TI partnered with Synopsys to deliver a Virtualizer development kit that pushes a “software-first” design. Engineers can validate OTA updates in a digital twin environment before hardware availability, which TI claims can reduce development schedules by up to a year.

Market Implications

With TDA5, TI is predicting that most vehicles will remain in the Level 2 to Level 2+ autonomy range for the foreseeable future. Still, they foresee demand for higher compute density, stronger safety guarantees, and greater architectural flexibility. As Sperlich puts it, “What we know is that we need to offer increasing levels of flexibility and scalability without compromising cost. That balance between performance, power, and cost is what ultimately defines whether a platform succeeds in the automotive market.”

Sampling of the first TDA54-Q1 devices is expected by the end of 2026, positioning TDA5 as a long-term platform rather than a point solution.