MagnaChip to Include Specialty High Density Capacitor Processes With Its Standard CMOS Mixed Signal Process

September 14, 2011 by Jeff Shepard

MagnaChip Semiconductor Corp. announced that it will offer high density metal-insulator-metal capacitor and deep trench capacitor processes for integration into MagnaChip’s standard CMOS mixed signal process.

The high density metal-insulator-metal capacitor process provides capacitance values of 4, 6, 8, and 10fF/um(2). This process replaces the industry standard silicon nitride insulator layer with a high dielectric constant material layer in order to achieve high capacitance per unit area while suppressing leakage current. This high density capacitor can substantially reduce die area in applications that need high total capacitance for the purpose of charge storage and noise decoupling.

The deep trench capacitor consists of an array of small deep trenches constructed into the silicon substrate. This 3-D capacitor has high capacitance of 22 fF/um(2) and breakdown voltage of 25V. This process is specifically optimized to make series resistance low enough for fast switching applications and will be released for production in December 2011.

TJ Lee, Senior Vice President and General Manager of MagnaChip’s Corporate and SMS Engineering stated, "We are very pleased to announce the offering of our specialty capacitor processes such as high density MIM capacitor and deep trench capacitor for feature-rich and cost-effective mixed signal applications. Our goal is to continue to develop highly differentiated and cost-effective technology solutions to meet the increasing application specific needs of our foundry customers."

The company’s high density capacitor is available for power management, RF and other mixed-signal applications.

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