The partners in a new publicly-funded research project announced details of the multinational/multidisciplinary program: "END – Models, Solutions, Methods and Tools for Energy-Aware Design." This three-year ENIAC (European Nanoelectronics Initiative Advisory Council) project is designed to enhance the competitiveness of Europe’s semiconductor and electronics equipment companies in developing new products and technologies that are at the forefront of energy efficiency.
The END project will pursue the energy efficiency objective through an innovative holistic approach that unifies, under a common design platform, the development of modeling, simulation, design and EDA techniques for a wide range of devices and systems (digital blocks, analog/RF blocks, discrete components). The project will also address the conception and experimentation of new power supply systems, with particular emphasis on energy management aspects. This mission enables a synergic approach to energy-aware design, offering a comprehensive set of solutions covering the many different facets of the complex problem of accounting for energy effects during the design of heterogeneous circuits and systems, such as those that will be hosted by the electronic products of the future.
"The ultimate objective of the END project is to bring innovative energy-aware design solutions and EDA technologies into the product development of the industrial partners of the Consortium," said Salvatore Rinaudo, END project coordinator and Industrial and Multisegment Sector CAD R&D Director at STMicroelectronics. "We will enable the design and manufacture of electronic circuits that will be at the basis of the green information society of the future."
END brings together the expertise of user companies (IDMs, fabless), design centers, universities and institutes in a range of projects that will establish standards and contribute to building a solid energy-aware electronics design base for Europe. In particular, the project goals include the development of power models for non-bulk CMOS devices, a unified low-power design methodology for heterogeneous systems and SoC (System-on-Chip) devices, energy-efficient building blocks for heterogeneous systems, energy-efficient IP components for SoCs, energy management of systems based on multiple, heterogeneous supplies, and demonstrators of solar energy and wireless sensor systems.
The project will cost approximately €12.6 million, with funding provided by both the ENIAC JU (Joint Undertaking) and from the public authorities of Belgium, Greece, Italy and Slovakia. The ENIAC JU is a public-private partnership with the European Commission, Member States, Associated States and European R&D actors and levers private and national investments.