Catalyst Semiconductor Inc. (Sunnyvale, CA), a developer and marketer of programmable products used in telecommunications, networking systems, computation, automotive, industrial and consumer markets, announced it has been awarded US Patent 6,518,737 on its low dropout (LDO) linear voltage regulator design. The new circuit technique enhances Catalyst's capability to incorporate its programmable EEPROM technology and mixed-signal design into system-level integrated circuits (ICs).
The patent covers a LDO linear regulator with non-Miller frequency compensation. Optimum frequency compensation and transient response are obtained by using wideband, low-power operational transconductance amplifiers. In contrast to previous approaches, requiring tightly specified, equivalent series resistance (ESR) for the external capacitor, the patented solution imposes no lower ESR limit. An LDO using a low ESR load capacitor will exhibit superior transient response with less undershoot or overshoot. The transient response of the patented LDO very nearly resembles the response of a single-pole system.
