ams Releases PDK for its 0.35µm Analog Specialty Processes

ams AG today announced the availability of its first interoperable process design kit (iPDK) for its 0.35µm analog specialty processes. iPDKs are based on the OpenAccess database and use standard languages as well a unified architecture to enable interoperability among multiple EDA vendor tools.

The new iPDK v4.10 significantly improves the time-to-market for highly competitive products in the analog intensive mixed signal arena. This comprehensive design environment with its highly accurate simulation models and parametrized device layouts (PyCells) based on the programming language Python provides a proven route to silicon.

ams’ new iPDK v4.10 supports the high performance 0.35µm process technologies C35 (CMOS), S35 (SiGe-BiCMOS), and H35 (High-Voltage CMOS). The ams iPDK comes complete with silicon-qualified digital, analog and RF library elements, complete sets of low voltage devices (3.3V and 5.0V) and high-voltage devices (10V, 20V, 50V and 120V devices) with various gate oxide thicknesses. Area-optimized high-density digital libraries, both for 3.3V and 5V as well as a wide selection of digital & analog IO libraries are available for the entire 0.35µm process family.

Fully characterized simulation models for a large set of simulators, extraction and verification run sets for both, Calibre and Assura and automatic layout device generators (PyCells) are included. Hence product developers are enabled with a plug-and-play tool set which facilitates "first time right" designs with EDA vendor tools of their choice.

“Foundry customers developing complex analog, mixed-signal products benefit in two aspects: First of all, the new iPDK is based on the industry benchmark ams hitkit and provides a complete design environment and proven design flow. Second, the iPDK enables interoperability among multiple EDA vendor tools.” said Markus Wuchse, general manager of ams’ Full Service Foundry division. “Expanding our foundry service and technology portfolio by offering much more flexibility in selecting their EDA tools enables our customers to immediately start design activities and to focus on their core competence – chip design.”