Applied Power Electronics Conference and Exposition APEC 2018

The 2018 Applied Power Electronics Conference and Exhibition (APEC) was held from March 4-8, 2018 in San Antonio Texas, USA. APEC, which is sponsored by the Power Sources Manufacturers Association, (PSMA), the IEEE Power Electronics Society (PELS) and the IEEE Industry Applications Society (IAS) is considered the premier global event in the applied power electronics field. APEC focuses on the practical and applied aspects of the power electronics business and covers a wide range of topics of interest to all branches of the power electronics field including OEMs, designers, manufacturers, marketing and sales. The conference addresses issues of both immediate and long-term importance to both students and practicing power electronics engineers. The venue was the sprawling Henry B. Gonzalez Convention Center in downtown San Antonio which provided ample space for the conference events including technical sessions, professional education seminars, social and networking events and a huge exhibit featuring more than 300 vendors.

The technical program began on Sunday, March 4 with a series of Professional Education Seminars. These seminars were tutorial in nature and combined both theory and practical applications. They were designed to further educate both students and working professionals in power electronics and related fields on the latest power electronics technologies and design techniques that are critical to the industry. This year there were six tracks: Fundamentals, Design, Reliability and Safety, Wide Bandgap, Inverters, and Grid. The six tracks were followed by a Monday plenary session featuring six presentations by industry leaders focused on current needs and future possibilities in energy efficiency. For the first time, the APEC plenary was live streamed courtesy of IEEE.TV.  

Tuesday through Thursday featured the technical and industry sessions. The technical sessions consisted of nearly 600 rigorously peer-reviewed papers from academic institutions, industry, and governments worldwide. The review process emphasized the most innovative technical solutions to current problems in order to achieve the highest quality technical program. An industry track ran in parallel to the technical sessions. Speakers in the industry sessions made a presentation only, without formally written manuscripts to appear in the conference proceedings. This allowed APEC to present the latest developments from the leading companies in the industry that would otherwise be unavailable. 

 

Figure 1: Vendors display the newest power electronics products at the APEC exhibit hall.

 

Although the industry sessions featured primarily technical presentations, there were also sessions devoted to business, manufacturing, and regulatory issues. In addition to the technical presentations, the conference featured a dialog session, which consisted of papers presented in a poster format. These presentations were selected through the same rigorous peer-review process as the oral presentations but addressed more specialized topics, which sessions offered participants and presenters the opportunity to speak at length and in detail about the work in a manner that was not available during the oral sessions.

Tuesday evening featured three well-attended “Rap Sessions”. In these sessions, a panel of experts presented their opinions on current and controversial topics relevant to the industry, then interacted with audience questions and comments. This year’s topics involved the impact of magnetics vs devices on power conversion, gate drive and isolation techniques, and the ongoing debate of GaN vs SiC vs Si for next-generation power devices.

A key feature of APEC is always the large and well-attended exhibit. The exhibit allows conference attendees to examine and evaluate the latest product offerings from the leading suppliers in the industry. A wide range of products including power supplies, devices, passives, design tools, test equipment, software, and other services was on display by over 300 exhibitors. The conference also included a series of exhibitor seminars, which were half-hour presentations that offered a more in-depth discussion of the various exhibitor’s products and services beyond what was available by simply visiting the booths.

A clearly evident industry trend at this year’s APEC conference was that the need for increasing both efficiency and power density is driving steady progress of the wide bandgap semiconductor devices, both GaN and SiC. These newer materials offer both improved switching and on-state performance as well as higher temperature operation compared to silicon and are continuing to gain market acceptance, particularly in the higher performance applications. SiC adoption is being led by the hybrid electric vehicle and industrial applications followed closely by renewable energy and industrial markets. GaN is seeing increased acceptance in battery chargers, telecom, and servers.

The performance benefits of GaN were highlighted in a number of industry and technical presentations. D. Kinzer of Navitas Semiconductor discussed the advantages of GaN technology for a number of USB-PD laptop adapters ranging from 27 W to greater than 70 W. The key point of this discussion was that although GaN can offer 5-10X better performance than Si in key figures of merit at the device-level for hard switched circuits, the bigger advantage is the use of monolithic integration with faster, soft-switched topologies. The presentation demonstrated the integration of a 650 V GaN FET with on resistance in the 110-560 Mohm range, with a GaN driver, regulator, dV/dt control and logic circuitry. This resulted in 2-3% improved efficiency compared to silicon using an active flyback zero-voltage switched topology.

S. Apter of VisIC Technologies presented a 1200 V half-bridge module based on GaN technology. The module is configured as a half-bridge with high-performance GaN switching transistors, gate drivers and sense circuits integrated into a single package. Experimental results were presented from a 3.6 kW CCM buck application circuit at a switching frequency of 100 kHz. Total efficiency including conductor losses was shown to be above 97.5%. 

G. DeBoy of Infineon discussed the value of enhancement-mode GaN HEMT devices for high-frequency and high-efficiency applications. Compared to a classical silicon superjunction structure the lateral GaN HEMT offers 10x reduced output charge, zero reverse recovery charge, and 10x lower gate charge. This enables better efficiency in resonant circuits and near-lossless switching. He emphasized that since the performance advantages have been well-characterized, the focus in GaN needs to move toward manufacturing and reliability issues. Presented data showed <5% variation in dynamic Rds over a wide range of temperature and operating conditions. He also presented Weibull plot data of failure mechanisms of devices tested to destruction. From this, he used established models of accelerated failure that predicted >50-year GaN lifetime at 100 ppm failure levels. He also demonstrated a 3 kW, 12 V output server power supply using e-mode GaN devices. He predicted that use of GaN would lead to both OPEX reductions due to the higher efficiencies and CAPEX reductions due to higher power density in data center applications.

P. DiMaso of GaN Systems presented a comprehensive analysis of GaN power device switching from a systems perspective. The presentation showed how the inherent performance advantages of GaN HEMTs such as fast switching and small dead times can be used to advantage in a number of circuit topologies including a bridgeless totem pole for PFC, LLC half-bridges, and a phase-shifted full bridge. DiMaso also emphasized that GaN HEMTS exhibit a stable threshold voltage over the normal operating temperature range which, coupled with the positive temperature coefficient of Rdson, eliminate current mismatches and current runaway thus simplifying parallel device operation.

SiC technology continues to mature as it transitions from a research activity toward increasing acceptance in high-volume commercial applications. To enable this widespread commercialization of SiC diodes and MOSFETs, high-volume, high yield, and low-cost manufacturing capability is necessary. A joint presentation by S. Banerjee of Littelfuse and A. Wilson of X-FAB described efforts toward this end. Wilson described how, with the support of the Power America Institute, X-FAB was able to leverage the economies of scale associated with a large volume CMOS fab to offer foundry capabilities for commercial SiC production. Wilson noted that more than 90% of the SiC processes are compatible with the processes already available in the silicon fab and stated that this approach has been successful in the production of both 1200 V SiC diodes and MOSFETs from the 150 mm X-FAB facility. 

A. Bhalla of United Silicon Carbide discussed the use of advanced SiC-based components to improve the performance of totem-pole PFC and vehicle on-board charger applications. He advocated the use of an integrated cascode combining a high-performance HV SiC JFET integrated with an optimized LV Si MOSFET in a single package. This combination offers standard gate drive and required no negative Vgs for turn-off. The structure also exhibits low diode Qrr and fast switching. 

A. Curbow of Wolfspeed described a high-power density SSiC-based150 kW inverter. A key point of his presentation is that drive, control, and system designs must be optimized to complement the high performance of the SiC devices. The inverter operated at 40 kHz and exhibited a power density of 780 W/in3.

X. Zhang of Monolith Semiconductor discussed system design challenges associated with utilizing SiC devices in high-efficiency, high-power density inverter designs and outlined a number of best practices to address these challenges. He stressed the importance of both power loop design and gate drive design and integration. Key characteristics of the gate driver include sufficient current capability to minimize switching loss, good isolation performance, and effective protection including fast turn-off during de-saturation due to the reduced short circuit capability of SiC MOSFETs, as well as overvoltage and undervoltage lockout. 

Y. Jiao of Delta Power Electronics Laboratories (DPEL) presented an experimental analysis of several state-of-the-art 1.2 kV SiC power switches. The comparison included both trench and planar SiC MOSFETS as well as a SiC JFET cascode. The devices were evaluated for both static and dynamic performance using both the intrinsic body diode as well as an external SiC Schottky diode as the freewheeling device. Their comprehensive analysis clearly presented the advantages and disadvantages for each of the device types and provided guidance for device selection to optimize system-level performance based on application needs. 

A full session was devoted to reliability and ruggedness of wide bandgap devices. A joint presentation by S. Watts Butler of Texas Instruments and T. McDonald of Infineon addressed the crucial topic of wide bandgap semiconductor qualification standards by introducing the new JEDEC Committee on Wide Bandgap Power Electronic Conversion Semiconductors, JC-70. Industry standards such as these are critically important to accelerate the widespread adoption of the wide bandgap devices. This committee, chartered by JEDEC in late 2017, is tasked to deliver reliability qualification standards, test methods and measurement techniques, data sheet elements, and device specifications unique to GaN and SiC devices in power conversion circuits. RF/microwave applications are not covered since their performance requirements are fundamentally different from power conversion applications. Although the standards are expected to encompass many of the traditional power device qualification tests such a thermal cycle, HTRB and HTGB, they are also likely to address typical use conditions in targeted applications and dynamic testing such as high temperature operating life, switching lifetime testing, and dynamic Rdson. 

A subsequent presentation by A. Ikoshi of Panasonic illustrated the use of dynamic high-temperature operating life testing to demonstrate the reliable operation of GaN gate injection transistors (GITs). The test used an inductive load switching test circuit in which both current and voltage could be independently varied as acceleration parameters.  Based on these acceleration parameters they predict > 20 year lifetime in a totem-pole PFC circuit.

P. Friedrich of Infineon presented a comprehensive discussion of gate oxide and threshold voltage reliability considerations for SiC MOSFETs. He noted that the gate oxides of SiC MOSFETs exhibit several challenges compared to Si. These include higher tunneling currents due to the larger bandgap, higher internal electric fields, and inherently higher defect density. He emphasized the mechanism by which these higher substrate defects, along with particles and process variations known as extrinsic defects, can lead to localized oxide thinning and premature reliability failures. The extrinsic failures can be mitigated by reducing substrate defect density, reducing the number of process-induced defects and limiting gate oxide electric field. The extrinsic reliability can be further improved by electrically screening devices to ensure excellent reliability.

J. Ingman of ABB discussed the importance of H3TRB testing as a means for assessing the long-term reliability of SiC devices in industrial environments. He proposed test conditions of 85oC, 85% relative humidity and 80% of rated voltage for a minimum of 1200 hours and stressed that the failure condition should be a deviation from an initial reference value rather than to the final datasheet spec.

Next year’s APEC will take place from March 17-21, 2019 at the Anaheim Convention Center in Anaheim, CA, USA. The paper submission deadline is July 09, 2018. Additional information can be found here.