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On-Chip Redundancy and the Myth of Independence

Redundancy is often treated as a numbers problem: add more blocks, duplicate critical functions, and safety improves. In battery management ICs, this has led to designs that advertise multiple ADCs and parallel signal paths as evidence of robustness.


Technical Article Feb 13, 2026 by Ahmad Ashrafzadeh, Nova Semiconductor

This article is published by EEPower as part of an exclusive digital content partnership with Bodo’s Power Systems.

At Nova, we recognized early that dedicated ADCs per cell are essential for truly independent and reliable measurements, and our work has helped shape industry thinking around this requirement. This trend underscores why understanding measurement independence, and not just the number of ADCs, is critical for modern BMS architectures.

 

Image used courtesy of Adobe Stock

 

But redundancy alone does not guarantee safety. What matters is independence.

When redundant functions share critical dependencies, such as voltage references, bias networks, multiplexers, clocks, or assumptions embedded in firmware, they form correlated failure domains. In those cases, a fault does not reveal itself through disagreement; it propagates identically through every “redundant” measurement. The system appears healthy while being uniformly wrong.

This distinction is especially important in BMS designs, where measurement accuracy underpins impedance estimation, balancing, fault detection, and protection decisions. If a common-cause failure affects measurements in the same way, whether through shared analog infrastructure or through die-level effects that impact multiple on-chip blocks, redundancy becomes an illusion rather than a safeguard.

This article examines two frequently overlooked aspects of this problem: shared dependencies within groups of on-chip ADCs, and the limits of redundancy implemented entirely within a single IC. By dissecting why these couplings matter, and why they persist, we can better understand what true measurement independence requires in modern BMS architectures.

 

Why Shared ADC References Undermine Measurement Independence

A common misconception in BMS IC design is that multiple ADCs automatically provide independent measurements. In reality, when a group of ADCs shares a single voltage reference, their readings are tightly coupled, and any error in the reference propagates identically across all measurements.

Consider a set of 16 ADCs within a single IC. Each ADC samples a different cell voltage, but all draw from the same reference. If the reference drifts due to temperature, aging, or electrical stress, all 16 measurements shift together. From a redundancy standpoint, the ADCs continue to “agree” with each other, giving the false appearance of accurate and consistent data. In practice, the system cannot distinguish between a true measurement and a correlated error caused by the shared reference.

 

Figure 1. Shared references create correlated errors; independent references allow faults to be detected. Image used courtesy of Bodo’s Power Systems [PDF]

 

This correlated error is particularly problematic for BMS functions that depend on precise measurements, such as:

  • Impedance estimation: small voltage differences define the calculated cell impedance. A reference shift introduces a uniform offset across all cells, skewing calculations.
  • Balancing decisions: automatic balancing relies on relative voltage differences. A uniform error can cause unnecessary balancing or leave imbalances undetected.
  • Fault detection and protection: threshold-based alerts may fail to trigger if all cell readings shift equally.

Importantly, this problem is structural, not an occasional glitch. It exists in every IC where multiple ADCs share a reference, independent of ADC resolution or speed. High-resolution ADCs amplify the visibility of the error: the measurements remain internally consistent, but systematically wrong.

By clearly separating ADC measurement independence from ADC count, we can understand why simply “adding more ADCs” is insufficient. True measurement independence requires either dedicated references for each ADC or an architecture that can digitally decouple ADC readings from a single reference.

 

Redundant On-Chip ADCs and the Limits of True Redundancy

Adding a second ADC on the same die is often presented as a redundancy measure. At first glance, two measurement channels appear to offer protection: if one fails, the other can detect disagreement or take over. However, most real-world failures in ICs are broadly coupled across the chip, meaning that both ADCs are affected simultaneously.

 

Figure 2. Redundant ADCs on one die share failure mechanisms and do not provide true independence. Image used courtesy of Bodo’s Power Systems [PDF]

 

Common-cause failures that impact multiple on-chip blocks include:

  • Thermal overstress: excessive heat affects the entire silicon die, including both ADCs
  • Overvoltage or ESD events: stress propagates through shared substrate and power networks
  • Process variations and aging: shifts in matching or bias circuits affect all analog blocks
  • Latch-up or substrate current events: impact multiple analog and digital domains at once

When a failure affects both the primary and the redundant ADC, there is no disagreement; both channels continue to report similar values, potentially masking faults. The system assumes redundancy exists, but the actual failure domain has not been separated, leaving the measurement and protection functions vulnerable.

This limitation demonstrates that physical redundancy on a single IC does not guarantee measurement independence. Even if each ADC uses a separate reference, many critical dependencies remain shared. A comprehensive approach to measurement independence requires addressing these cross-channel couplings at the architectural level — something that cannot be solved simply by duplicating blocks on the same die.

 

Digitally Assisted Analog: Solving the Scaling Challenge

One of the key obstacles to achieving true measurement independence in BMS ICs is practical scaling. In conventional analog designs, adding more ADCs quickly becomes expensive: each additional ADC consumes area, increases power, requires extensive testing and trimming, and demands careful calibration. Attempting to duplicate references along with ADCs makes the problem even worse; there simply isn’t enough die area, and design complexity grows disproportionately. As a result, engineers are forced into compromises, sharing references or minimizing the number of ADCs, which introduces correlated measurement errors and undermines redundancy.

Digitally Assisted Analog (DAA) addresses this challenge by shrinking the analog footprint of each ADC. Calibration, error correction, and signal conditioning are moved into the digital domain, making it feasible to replicate ADCs without the traditional area or power penalty. With smaller ADCs, it also becomes practical to implement dedicated references for each channel, solving the problem of correlated measurement error within each ADC group (Problem 1). Of course, this approach only works when all components are highly accurate. Multiplying ADCs and references with large error margins would exacerbate the problem rather than solve it.

 

Figure 3. A quick and robust way to detect errors: a mismatch between full-pack voltage and the sum of cell ADCs indicates a measurement fault. Image used courtesy of Bodo’s Power Systems [PDF]

 

Figure 4. Detailed NB1600 architecture: scalable per-cell ADCs, full-pack measurement, and digitally assisted analog enable precise, reliable battery management. Every ADC channel uses a dedicated reference to ensure true independence. Image used courtesy of Bodo’s Power Systems [PDF]

 

DAA also partially addresses Problem 2. By measuring the full pack voltage with an independent reference and comparing it against the sum of individual cell voltages, designers can catch some faults that would otherwise affect multiple ADCs on the same die.

While this does not replace true redundancy, which would require physically separate ICs, it provides a simple, practical method to introduce a meaningful level of redundancy without dramatically increasing system complexity.

The result is a scalable, architecturally sound approach where each cell voltage is measured independently, correlated errors are minimized, and the measurement system is robust enough for high-channel-count packs.

 

Conclusion

Redundancy in battery management ICs is not a matter of simply adding more ADCs or duplicating measurement paths. True safety and measurement integrity depend on independence: isolating failure domains so that a fault in one path does not propagate to others.

Two key challenges limit conventional analog designs: shared references within ADC groups introduce correlated measurement errors, and redundant ADCs on a single die cannot fully protect against chip-level faults. Adding components alone does not guarantee reliable measurements or meaningful redundancy.

The NB1600 demonstrates how these challenges can be addressed in practice. Using Digitally Assisted Analog, every cell ADC, as well as the full-pack ADC, has its own independent reference, minimizing correlated errors and enabling meaningful redundancy without excessive area or power. As we at Nova have emphasized, dedicated ADCs per cell are essential for truly independent and reliable measurements. This design principle has helped shape industry thinking. While true redundancy still requires physically separate ICs, this approach provides a practical, scalable path to high-accuracy, high-channel-count BMS designs.

Ultimately, evaluating redundancy requires asking the right questions: Are your measurement paths truly independent? Are your failure domains separated? Only by addressing these questions can designers ensure that their BMS provides both accurate cell-level data and meaningful protection.

 

This article originally appeared in Bodo’s Power Systems [PDF] magazine.