Technical Article

Boost Topologies for 1500V Multi-String Solar Inverters

April 13, 2020 by Matthias Tauer

This article investigates the performance and cost of different boost topologies for 1500V multi-string solar inverters.

Designers are seeking for a higher level of integration, which means the mounting of the boost inductors on the printed circuit board (PCB). Besides this fact, also efficiency and cost are important aspects to be considered.

This case study investigates the optimal solution to meet cost and performance requirements at the same time. It introduces a new three-level boost topology named flying capacitor boost and shows that this topology outperforms in cost and performance.

 

Comparing Boost Topologies

Three different types of boost topologies will be compared: two-level, three-level symmetric and three-level flying-capacitor circuit.

 

Two-level boost circuit
Figure 1: Two-level boost circuit
Three-level symmetric boost circuit
Figure 2: Three-level symmetric boost circuit
Three-level flying-capacitor boost circuit
Figure 3: Three-level flying-capacitor boost circuit

 

The three-level topologies comprise an additional third voltage level. This third voltage level reduces the voltage across the boost inductor, boost switch and diode to half the value required for two-level topologies. Less voltage across the boost inductor has the advantage that the required inductance for a given ripple current is only half of the required inductance at two-level. In consequence, the overall inductor volume, weight, and cost is reduced. This benefit is not considered in the following power module cost benchmark and should, therefore, be kept in mind. In the symmetric boost topology, the third voltage level is created by splitting the boost circuit into a positive and negative part. Input and output capacitors are split as well and connected to the neutral point, which provides the additional third voltage level. The pulse-width modulation (PWM) pattern needs to be corrected in order to ensure symmetry of the neutral point. The flying-capacitor boost topology creates the third voltage level – as the name indicates – by a floating or flying-capacitor (C-FC). The flying-capacitor shall be charged to half of the output voltage. It is noticeable that only one boost inductor is required.

 

Cost and Performance Benchmark

In this case study, the cost and performance is compared for a 21 kW boost leg of a 1500 V multi-string solar inverter. Following topologies and chipsets are benchmarked:

 

Chipset Two-Level Three-Level Symmetric Three-Level Flying-Capacitor
Si/SiC hybrid not examined as efficiency
doesn’t meet the requirement
1200 V fast Si IGBT
1200 V SiC diode
full SiC 1700 V SiC MOSFET 1700 V SiC diode 1200 V SiC MOSFET
1200 V SiC diode

 

From the efficiency benchmark in Figure 4, it can be seen that the full SiC two-level boost stage has the lowest efficiency (red dotted line) and the highest price (Figure 5). The hybrid chipset would even have lower efficiency in this frequency range and therefore is not taken into account.

 

Module efficiency benchmark – conditions: Vin = 760 V, Vout = 1200 V, Pdc = 21 kW
Figure 4: Module efficiency benchmark – conditions: Vin = 760 V, Vout = 1200 V, Pdc = 21 kW

 

The flying-capacitor (FC) boost topology (solid and dashed blue line) shows always higher efficiency as the symmetric boost (solid and dashed green line). Both use the same components and therefore have the same module price. The first conclusion to be drawn is that the flying-capacitor topology has the best price and performance ratio compared to symmetric and two-level boost topology.

 

Module cost benchmark
Figure 5: Module cost benchmark

 

Up to 50kHz, the hybrid flying-capacitor topology (solid blue line) has the highest efficiency. Above 50 kHz the full SiC flying capacitor boost circuit (dashed blue line) has the highest efficiency, but also a higher price than the hybrid circuit.

 

Operation mode 1 – excitation
Figure 6: Operation mode 1 – excitation
Operation mode 2 - free-wheeling
Figure 7: Operation mode 2 - free-wheeling
Operation mode 3 – excitation
Figure 8: Operation mode 3 – excitation
 

The two-level boost and three-level symmetric boost topologies are already well described in the literature and considered as state of the art. In the following section, the flying-capacitor topology is discussed.

 

Flying-capacitor boost topology in details

The two semiconductor switches T1 and T2 in the flying-capacitor topology are controlled on phase opposition (180° phase shift), but with identical on time (duty cycle). During normal operation, T1 and T2 are never turned on at the same time. In continuous conduction mode (CCM) the duty cycle (D) can be calculated to

 

$$D = 1 - \frac{V_{in}}{V_{out}}$$

 

The operation is divided into three modes. In mode 1 the low-side switch T2 is turned on and the inductor current is rising. The current is flowing through D2, the flying-capacitor (C-FC) and T2. Once T2 is turned off mode 2 is entered. In mode 2 the current is freewheeling through D1, D2 and the output capacitor. In mode 3 the floating switch T1 is turned on and the inductor current is rising again. The current is flowing through T1, the flying-capacitor and D1. After turning off T1, mode 2 is entered again and the sequence starts from the beginning. The normal operation mode sequence is:

 

1 → 2 → 3 → 2 → 1

 

Figure 9 shows for the sake of clarity the gate signals of T1 and T2 together with the boost inductor current IL. The inductor current period is defined from one rising slope to the next rising slope. The period of the PWM fundamental switching frequency is defined from the rising edge of T1 or T2 to the next rising edge of the same gate signal. It then shows that the inductor current period is half of the PWM period or in other words, the inductor current frequency is double of the PWM frequency.

 

Gate signals of T1 (VG1), T2 (VG2) and boost inductor current I(L)
Figure 9: Gate signals of T1 (VG1), T2 (VG2) and boost inductor current I(L)

 

The flying-capacitor boost topology allows for an existing choke design with fixed inductivity and ripples current to halve the PWM frequency (case 1 in Figure 10). In the first approximation, this will also half the semiconductor switching losses and increase the power module efficiency. Figure 4 illustrates case 1 for 40 kHz inductor current frequency: The efficiency can be increased from 98.8% (symmetric boost stage) to 99.24% (flying capacitor boost stage).

 

Potential for optimization with flying-capacitor boost topology
Figure 10: Potential for optimization with flying-capacitor boost topology

 

Another potential for optimization is to keep the power module losses constant (same module efficiency), but increase the inductor current frequency (case 2 in Figure 10). Figure 4 shows for case 2 that the efficiency is not changing when the inductor current frequency is doubled from 40 kHz (symmetric boost stage) to 80 kHz (flying-capacitor boost stage).

An investigation of the required boost inductance shows that moving from two-level to three-level cuts the inductance to half and the additional doubling of the inductor current frequency further halves the required inductance for the same ripple current. Boost inductance of two-level can be calculated to

 

$$L_{2L} = \frac{U_{L} \cdot t_{on}}{\Delta I}$$

L2L: boost inductance of two-level boost
UL: voltage across boost inductor
ton: boost switch on-time
ΔI: inductor current ripple

 

Moving from two-level to three-level will reduce the voltage across the inductor to half value:

$$L_{3Lsym} = \frac{\left(\frac{1}{2} \cdot U_{L}\right) \cdot t_{on}}{\Delta I} = \frac{1}{2} \cdot L_{2L}$$

L3Lsym: boost inductance of three-level symmetric boost
L2L: boost inductance of two-level boost

 

Moving from symmetric boost to flying-capacitor boost topology will double the inductor frequency or half the on-time:

$$L_{3L-FC} = \frac{\left(\frac{1}{2} \cdot U_{L} \right) \cdot \left(\frac{1}{2} \cdot t_{on} \right)}{\Delta I} = \frac{1}{2} L_{3Lsym} = \frac{1}{4} L_{2L}$$

L3L-FC: boost inductance of three-level flying-capacitor boost
L3Lsym: boost inductance of three-level symmetric boost
L2L: boost inductance of two-level boost

 

Conclusion and outlook

This article discussed the benefits of flying-capacitor boost topology in regards of cost and performance. The costs for symmetric and flying-capacitor boost topology are the same, but the flying-capacitor boost circuit comprises higher efficiency at the same inductor current frequency. Alternatively, it can even double the inductor current frequency while keeping the module efficiency. In the required frequency range, the two-level full SiC boost circuit can’t meet the required efficiency and cost. This article will be continued by taking a closer look into the flying-capacitor topology, discussing its challenges e.g. balancing strategy of the flying-capacitor and further highlighting the system-level benefits.

 

References

  • "Symmetrical Boost Concept for Solar Applications up to 1000V", Temesi, Frisch, 01/2009

 

This article originally appeared in Bodo's Power Systems magazine.