Automotive SiC MOSFETs in LowInductive SMD Package with Kelvin Source
This article discusses the performance benefits arising from the use of a low-inductive SMD package with a Kelvin-Source pin for fast SiC MOSFETs.
It is widely accepted that modern Silicon Carbide (SiC) MOSFETs can achieve very high switching speeds, which helps to reduce the energy loss in power electronic converters significantly. However, the full potential of the devices cannot always be utilised due to the limitations of the traditional power semiconductor packages. In this article, some of these limitations are discussed and benefits obtained by utilising more suitable packages are explored. Finally, the effect of this package level improvement on a 3.7 kW single-phase PFC using a totem-pole topology is shown.
Switching performance limitations of traditional power device packages Figure 1 shows one of the most widely used traditional packages for power transistors: the TO-247. As illustrated in the picture, each leg of the device presents a parasitic inductance element. These have been added to a very simple representation of a typical gate drive circuit. From this representation, it can be seen that the inductances of the drain and source pins add to the loop inductance in which the main current is switched. This causes over-voltage at turn-OFF and as a result, the switching speed needs to be limited to ensure that the specifications are not exceeded.
Figure 1: Traditional power device package and its parasitic inductances
Figure 2: VGS’ at chip is reduced during turn-ON due to LS
The parasitic inductances of the gate-leg and of the source-leg are part of the gate-drive loop. This impedance has to be overcome when driving the MOSFET. Additionally, oscillations between this inductance and any parasitic capacitances in the gate drive circuit can occur. Finally, because LS is present in both the power loop and the gate loop the inductive voltage drop VLS across this inductance during turn-ON of the MOSFET (as a consequence of increasing IS) reduces the effective gate voltage, which slows down the turn-ON of the MOSFET. This is illustrated in Figure 2.
One approach to improve this situation is the introduction of the so-called ‘Kelvin Source’ pin to the TO-247 package. This solution offers significant improvement by separating the gate-drive loop from the power source terminal. Hence, the turn-ON is not slowed down by a voltage drop due to the rising source current, leading to significant reductions in turn-ON losses.
Improved Switching Behavior in TO-263-7L
ROHM Semiconductor is extending its portfolio of discrete SiC MOSFETs with the upcoming release of automotive-qualified devices in the TO-263-7L SMD package. The benefit of the Kelvin connection to the source terminal of the SiC MOSFET provided by the TO-263-7L package is illustrated in Figure 3. It can be seen that the main source inductance LS is no longer shared by the gate-drive loop and the main current path. As a consequence, the device can be turned ON faster which leads to reduced turn-ON loss.
Figure 3: TO-263-7L SMD package and its parasitic inductances
The additional benefit of the TO-263-7L package is that it has much lower stray inductances than the TO-247 package and its variants. This reduction in package inductance is achieved because of the drain being a large area connection and the source realized by multiple short leads in parallel.
To quantify the benefit of the new package for the device performance a direct comparison of the turn-ON and turn-OFF process for the same SiC MOSFET chip in two different packages and with otherwise comparable conditions is shown in Figure 4.
Figure 4: Comparison of switching behavior of 40mΩ 1200V SiC MOSFETs
From the switching transients it can be seen that at turn-ON, the three-lead device is limited in terms of switching speed because the inductive voltage drop across the source terminal reduces the effective gate voltage leading to a long period at the Miller plateau, which causes significant turn-ON losses. For the device in the SMD package with Kelvin Source connection to the gate driver this period is much shorter and hence the turn-ON loss is reduced. The turn-OFF transient shows that in the SMD package a much higher dI/dt can be achieved due to the reduced parasitic inductance and hence the turn-OFF loss is also less than in the TO-247 package.
In the below diagram the switching energies achieved for both devices are shown as a function of switched current. It becomes apparent that at higher current the benefit of increased turn-ON speed of the device in TO-263-7L is most relevant.
Figure 5: Comparison of switching losses of 40mΩ 1200V SiC MOSFET in 3-pin TO-247 and TO-263-7L package (Gate driver with miller-clamp (MC) and anti-parallel SBD on the gate used)
As the above comparison shows the performance advantage of the package with kelvin-source connection for the gate-driver and reduced overall parasitic inductances is very significant especially for high currents and will result in lower overall losses for the same switching frequency or lead to an increase in the switching frequency if loss reduction is not the primary objective.
Line-up of New SMD Devices
In addition to the 1200V, 40mΩ device as mentioned in the above paragraphs, a full line-up of SiC MOSFETs in the TO-263-7L package with rated voltages of 650V and 1200V will shortly be released in the market. Please refer to Table 1 for the currently planned devices. Automotive qualified variants of these devices are also planned.
Applicability of SiC MOSFETs in SMD Package for On-board Charger (OBC)
To illustrate the performance that can be achieved with SiC MOSFETs in SMD packages the application example of a 3.7kW single phase PFC stage is considered here. A single-phase PFC with such a power rating can be employed as the input stage for a single-phase 3.7kW on-board charger or as a building block for an 11 kW three phase on-board charging system. In the latter case, three single-phase PFCs can be combined using a switching matrix at the input to allow for either single phase or three-phase operation of up to 11kW. This approach is illustrated in the block diagram in Figure 6.
Figure 6: Block diagram of 11kW OBC built up of multiple 3.7kW PFCs
Possible PFC topologies are shown in Figure 7. The classical boost PFC has limits in terms of the achievable efficiency due to the presence of the diode rectifier at the input. In the two phases bridgeless PFC as well as the two variants of the Totem Pole PFC this input rectifier is eliminated which reduces the overall conduction losses. The two phase bridgeless PFC enables high efficiencies, but has the downside that each leg is only utilized during half of the input cycle. As a result, large power cycling stress is imposed on the power semiconductors and the ratio of peak current to RMS current of each devices is high.
Table 1: Planned line-up of Trench SiC MOSFETs in TO-263-7L package (currently in development)
Two different types of the Totem Pole PFC can be realized. In the simplest case, two transistors and two diodes are used. The diodes switch at low frequency and hence devices with low forward voltage drop are selected. Since the body-diodes in the transistors are used for commutation it is important to select devices with body-diodes that can be used in hard commutation. Modern wide-bandgap semiconductors such as SiC MOSFETs have body-diodes that are usable in hard switching and thus these devices are a very good choice for this application. Finally, if the highest possible performance is desired the losses can be further reduced by replacing the diodes in the low frequency leg with active switches such as SJ MOSFETs.
To illustrate the kind of performance that can be achieved in a Totem Pole PFC a simulation was carried out. For this simulation, the measured switching energies for a 650V SiC MOSFET with 60mΩ on-resistance in TO-263-7L were considered. A switching frequency of 100 kHz has been assumed and the semiconductor losses of the HF leg as well as the LF leg were modeled. For the LF leg only the conduction losses of a 60mΩ device were considered, as negligible switching losses occur.
Figure 7: Topologies for single-phase PFC
Figure 8: Estimated efficiency for Totem Pole PFC considering only semiconductor losses
The results of this simulation are shown in Figure 8. As can be seen the maximum efficiency is in the region of 98.7% at around 60% of nominal output power. Additional losses have not been modelled at this stage. Of course, losses in the inductor and other passive components as well as the control and gate-driving circuits, need to be considered for a full analysis. Nevertheless, it becomes apparent that a high-performance PFC can be realised with the Totem Pole PFC using 650V SiC MOSFETs.
In this article, we have seen the performance benefits, which arise from the use of a low-inductive SMD package with a Kelvin-Source pin for fast SiC MOSFETs. It was shown that at high currents the turn-ON loss in the SMD package is significantly reduced, as the gate loop is not impacted by the dI/dt and the resulting voltage drop across the source terminal inductance. The overall reduction in package inductance allows much higher turn-OFF speeds for the SiC MOSFET. Both advantages together result in significant reductions in the turn-ON and turn-OFF energy losses. On the system side we have seen that 650V SiC MOSFETs with RDS (ON) values in the region of around 60mΩ in a Totem Pole PFC result in conversion efficiencies in excess of 98%. This enables very compact designs, which are particularly important for the development of on-board charging systems in automotive applications.
About the Authors
Christian Felgemacher received the MEng (Hons) degree in electronics and electrical engineering with management from the University of Edinburgh in 2011 and the Dr.-Ing. Degree from the University of Kassel in 2018. He worked as a Research Assistant at the Centre of Competence for Distributed Electric Power Technology (KDEE) at the University of Kassel from 2012 to 2017. During this time he worked on reliability aspects of power semiconductors in PV inverters and the utilization of wide-band-gap devices in renewable energy applications. Since April 2017 he is with ROHM Semiconductor and is currently supporting European customers as Field Application Engineer for power semiconductors.
Felipe Filsecker works as an Application Engineer in Power Systems Department at Rohm Semiconductor, where he specializes in power electronics design, power devices, as well as power converters. He earned his Degrees in Electrical and Electronics Engineering at TU Berlin and at the Pontifical Catholic University of Valparaíso. He has also accomplished 8 publications of his research.
Farhan Beg received his Master's Degree in Electrical Power Engineering at RWTH Aachen University. He worked as field applications engineer at ROHM, then product development engineer automotive at Power Integrations.
Aly Mashaly completed his studies in electrical engineering at the University of Cairo, followed by a master's program at the Leibniz University Hannover. He started his career as a Development Engineer Power electronics at Liebherr Elektronik GmbH. He then took over the management of the eMobility division at KEB GmbH. He has been working for Rohm Semiconductor GmbH since July 2015, where he is responsible for the Power Systems division for the European market.
Seiya Kitagawa is part of research and development division at Rohm Kyoto, Japan, a company that designs and manufactures semiconductors and other electronics components.
This article originally appeared in the Bodo’s Power Systems magazine.