Vertical Stacked Voltage CPU Regulator Delivers 10x Power

June 08, 2022 by Darshil Patel

Princeton researchers have found a way to deliver 10 times the power to processors with a compact but high-powered and efficient device.

CMOS semiconductor technology has followed Moore's law for the last few decades. This trend will continue in the foreseeable future. However, a consequence of this technology scaling is the increased power density because the transistors are scaling faster than the power per transistor.

Current high-performance computing systems comprise billions of transistors switching at ultra-fast speeds, consuming hundreds of amperes of current at low voltages in a small area—the number of processing cores in a processor double with every technology generation. Current graphical processing units (GPUs) incorporate hundreds of parallel processing units in a single chip. These trends result in requirements to improve the power density and current area density of the power electronics.

The problem becomes more prominent in applications such as data centers, where power consumption is significantly high. Also, most data centers run at high voltage levels of around 48V to reduce power distribution. Therefore, efficient power delivery architectures with high-power density and high bandwidth need to be developed.


Problems with Current Power Delivery Networks

The voltage regulators or any other power supply block is often bulky and cannot directly connect to the targeted microprocessor. To establish this connection, interconnect wires are used, and wires have parasitic resistance and inductance. Large currents flowing through these wires can create time-varying fluctuations of the voltage delivered to the processor, creating reliability issues.

Therefore, a suitable power delivery network must be implemented between the target integrated system and the power supply to regulate the voltage for the required current to be supplied to the transistors.

One of the solutions to this problem is to stack multiple silicon dies vertically and connect them via through-silicon vias. Three-dimensional (3D) integration or vertical stacks provide significantly more bandwidth required for faster integrated circuits.


Vertical Stacked Voltage Regulator

The researchers at Princeton University developed a 48 - 1V two-stage converter featuring 3D stacked packaging for miniaturized size and fast speed. As mentioned in the earlier section, power supply blocks are bulky and cannot directly connect to the target processor. Therefore, the Princeton researchers aim to make the footprint area of voltage regulators smaller than any microprocessor to enable multiple system-level opportunities.


The new small-scale but high-power-density power system for computers. Image used courtesy of Princeton University


They chose a switched capacitor-based topology because these topologies are transformerless, offer reduced device voltage and current stress, and can provide soft charging and soft switching. The researchers developed a modular and scalable 48 - 1 V voltage regulator with the linear extendable group operated point-of-load (LEGO-PoL) architecture to achieve high current density. Their regulator can vertically deliver power to the target systems and consists of coupled inductors for soft switching to reduce the size and improve the system performance during the transient.


Topology of a two-stage LEGO-PoL converter with 48-V input voltage and 1-V output voltage. Image used courtesy of Princeton University.


The team of researchers fabricated a vertically stacked 48 - 1V voltage regulator with vertically coupled inductors to deliver 780A of output current at a 0.8 - 1.5V regulated voltage range. Their prototype achieves a peak efficiency of 91.1% and can attain a power density of 1000W per cubic inch. However, the system must be liquid-cooled when operating above 450A to maintain junction temperatures below 95 degrees Celsius.

The researchers are now aiming to achieve the area density of 4.5W/mm2 while maintaining high efficiency. For this, they plan to improve the vertically stacked inductors and capacitors to reduce the height and weight of the system.


Feature image courtesy of Princeton University