Siliconix Inc. (Santa Clara, CA), a subsidiary of Vishay Intertechnology Inc. (Malvern, PA), announced a new series of junction FETs (JFETs) that eliminate the problem of latch-up in amplifier designs. The complete family of new "no-latch" monolithic dual JFETs, which includes more than 20 devices, provides an exposed substrate connection via an external pin, allowing designers to bias the substrate with a positive potential to prevent a latch-up condition.
Monolithic dual JFETs are widely used as a high-performance differential front-end for amplifiers in test equipment, industrial process equipment, military monitors and any other application where high-accuracy data acquisition is needed. Integrating two transistors on the same substrate ensures that the temperature of both channels is the same. As a result, performance is more evenly matched across the device's operating temperature range than in implementations with two single-die JFETs.
The more than 20 devices offer a range of breakdown voltages from -25V to -50V. The offset/drift voltage ranges from 40mV to 5mV for superior low-noise capability. The tight VGS matching minimizes errors in front-end amplifiers. A range of gate-to-source, cut-off voltage ratings from -0.5V to -6V gives designers a wide choice of devices to suit their specific applications. Samples and production quantities of the new no-latch JFETs are available now, with lead times of six to eight weeks for larger orders. Pricing starts at less than $1 in 1000-piece quantities.
