Programmable Multirail PMIC for Multicore Processors, FPGAs, and Systems
The TPS650861 device family from Texas Instruments is a single-chip power-management IC (PMIC) designed to be programmed for optimal output voltages and sequencing. The TPS650861 has three controllers to provide flexible power capable of up to 30A with large external FETs for high power designs but which can scale down in both size and cost for smaller designs.
Typical applications are expected to include: programmable logic controllers, machine vision cameras, video surveillance equipment, test and measurement systems, embedded PCs, and motion controls.
Combined with three 3A converters, three general purpose LDOs, a termination LDO for DDR, and three load switches, the TPS650861 can provide system power for a wide variety of applications. The D-CAP2™ and DCS-Control high-frequency voltage regulators use small passives to achieve a small solution size.
The D-CAP2 and DCS-Control topologies have excellent transient response performance, ideal for processor core and system memory rails that have fast load switching. The device has two banks of one-time programmable (OTP) memory.
Summary of features and specifications includes:
- Two Banks of One-Time Programmable Memory for Programming Default Voltages and Sequence
- Wide VIN Range from 5.6V to 21V
- Three Variable-Output Voltage Synchronous Step-Down Controllers With D-CAP2™ Topology
- Scalable Output Current Using External FETs with Selectable Current Limit
- I2C DVS Control from 0.41V to 1.67V in 10-mV Steps or 1V to 3.575V in 25-mV Steps or Fixed 5V Output
- Three Variable-Output Voltage Synchronous Step-Down Converters with DCS-Control Topology
- VIN Range from 3V to 5.5V
- Up to 3 A of Output Current
- I2C DVS Control from 0.425V to 3.575V in 25-mV Steps
- Three LDO Regulators with Adjustable Output Voltage
- LDOA1: I2C-Selectable Voltage from 1.35V to 3.3V for up to 200mA of Output Current
- LDOA2 and LDOA3: I2C-Selectable Voltage from 0.7V to 1.5V for up to 600mA of Output Current Each
- VTT LDO for DDR Memory Termination
- Three Load Switches with Slew Rate Control
- Up to 300 mA of Output Current with Voltage Drop Less Than 1.5% of Nominal Input Voltage
- RDSON <96mΩ at Input Voltage of 1.8V
- 5-V Fixed-Output Voltage LDO (LDO5)
- Power Supply for Gate Drivers of SMPS and for LDOA1
- Automatic Switch to External 5-V Buck for Higher Efficiency
- Built-in Flexibility and Configurability by OTP Programming
- Six GPI Pins Configurable to Enable (CTL1 to CTL6) or Sleep Mode Entry (CTL3 and CTL6) of Any Selected Rails
- Four GPO Pins Configurable to Power Good of Any Selected Rails
- Open-Drain Interrupt Output Pin
- I2C Interface Supports Standard Mode (100kHz), Fast Mode (400kHz), and Fast Mode Plus (1MHz)