LDO Low Noise Combine with SMPS High Efficiency

The new JC-PFM™ dc-dc converter chipset from TransSiP consists of an integrated micro dc-dc converter and Harmony™ SNJ conditioner. The JC-PFM™ chipset integrates all components necessary to provide regulated output voltage from 1.0- to 4.-0Vdc (±2.0%, 0.1V step increments) at 50/200mA with up to 93% conversion efficiency at full load and over 80% in power saving modes in two microLGA packages. Applications include spread-spectrum wireless communications (WiFi, BLE, ZigBee), GPS/GNSS navigation/positioning, as well as other standby mode functions in remote, portable, wearable, and IoT devices.

Up to now switched-mode and in particular highly-efficient pulse-frequency modulation type dc-dc converters have been avoided in design of power-constrained portable/wearable, remote and IoT systems due to the chaotic nature of switching noise on the regulated output voltage. TransSiP's breakthrough discovery is that dislocations in timing of switched-mode dc-dc conversion switching noise, or switching noise jitter (SNJ) become the dominant factor in downstream system performance once the amplitude of switching frequency noise components is attenuated on the supply bias.

The presence of SNJ means performance of noise-sensitive circuitry such as spread-spectrum communications transceivers, GNSS/GPS receivers, ADCs, or precision clocks will be sub-optimal or degraded if only switching noise amplitude is attenuated, especially under very weak signal and/or limiting operating conditions.

TransSiP's innovative patent-pending JCâ„¢ SNJ conditioning technology combines a broadband attenuator and switching noise conditioner, reducing or eliminating the chaotic noise components. Once SNJ is reduced or eliminated, downstream circuit performance is significantly improved under nominal to limiting operating conditions, attaining a level equivalent to if not better than a low noise LDO implementation.

This opens the door to new levels of functionality and autonomy for power-constrained systems which simultaneously desire long battery life and maximum system performance under nominal to limiting operational conditions.

William Burr, VP of Business Development, commented: "The new chipset is integral to TransSiP's vision of enabling technologies for the emerging future of personal electronics. Portable/wearable, remote, sensing, and IoT systems suffer from limited battery life because performance of wireless and navigation/positioning circuitry at the heart of these devices is highly-sensitive to noise, requiring inefficient linear voltage regulation (so-called low drop-out or LDO). TransSiP's breakthrough JCâ„¢ technology reduces or eliminates the chaotic noise signature of highly-efficient PFM-type dc-dc converters, with dramatic improvements in battery life and enhanced user experience."