Selecting and Operating Switching Power Transistors: SiC Components

With 3 materials and about 8 types of transistors to select from — although not all combinations are available  — the choice of the optimum switching transistor is difficult This article is especially also written for the benefit of our young engineers.

In the first two articles of this series, we discussed the main requirements for power transistors, Si power bipolars, the structure and breakdown of standard Si MOSFET power transistors, and super junction transistors and the operation of Si MOSFETs in the realm of drive circuits and Si IGBTs. 

In this third article of the series, we will look at the SiC power transistors. 

 

SiC Components

In contrast to GaN SiC is based on > 15 years of practical manufacturing and application experience with diodes and> 10 years with transistors. SiC JFETs and cascodes constitute a solid technology, SiC enhancement MOSFETs are supported by heavyweights like Infineon, Rohm, Microsemi, to name a few, Also SiC IGBTs and BTs are being developed. SiC easily takes high voltages, even the first ones were specified for 1200 to 1700 V. There is no question that SiC has a very bright future alone in the exponentially growing electric vehicle market where it will replace Si IGBTs in the long run.

 

7.1 Material Properties

These are the most important advantages over silicon:

1. Wide bandgap 3.2 vs. 1.1 eV
2. Far better breakdown field strength 2.4 vs. 0.25 MV/cm
3. Far better thermal conductivity 3.3 ... 4.9 vs. 1.5 W/cmK
4. Far better drift velocity of electrons 1400 vs. 950x103 cm2 /Vs 5. Far higher maximum Tj 250 C

 

Figure 7.1 Visualizing the advantages. 

 

SiC's Special Properties:

1. High breakdown voltages in the kilovolt range and low leakage currents.
2. Continuous high-temperature operation up to appr. 250 C.
3. High switching speed.
4. No increase of losses with temperature.
5. Excellent heat transfer, > 3 times that of silicon.

 

Figure 7.2 Lattice displacements are the cause for the difficulties of producing low-cost SiC semiconductors. A' would be located at A if there were no displacements. There are more lattice defects, all contribute to low yield.

 

Serious production problems hampered the introduction of SiC for a long time. Initially, it was only possible to produce small wafers with a high defect rate. The first available SiC products, the diodes, were very expensive. Still today the wafers are rather small compared to Si wafers, the yield lower, there are only a few wafer manufacturers. A leading firm is Cree where the material is also used for their LEDs.; Cree recently invested heavily expecting big business from the automotive industry, alone from VW, which will certainly materialize. Probably there will be a shortage of SiC within a few years. Which are the reasons for the limited availability and the high prices? The main reason is the defect rate which caused low yield. Figures 7.2 to 7.5 visualize these problems.

 

Figure 7.3: The picture shows so-called micropipes which render the material unusable. Those are holes which look like a tornado, they are some micrometers in diameter and go all the way through the whole wafer. For many years they were the main cause of low yield.

 

The higher thermal conductivity means that the thermal resistance between junction and case remains the same although the chips are much smaller. Parts in TO-220 specify 1.5 degrees/W, the same as state-of-the-art Coolmos.

 

Figure 7.4: The band gaps of Si and SiC. The higher bandgap allows high-temperature operation at 250 C and kilovolts. SiC takes 10 times higher fields than Si. Theoretically even operating temperatures of > 500 C were possible.

 

Figure 7.5: Charge carrier concentration of Si and SiC. Apart from the bandgap this determines up to which temperatures a semiconductor remains one. This temperature is > 1000 C for SiC. Above the material remains only a resistor.

 

The high permissible field strength allows to reduce the drift zone to 1/10 of Si and to dope it 10 times higher. This reduces Rdson to typically 1/10 of that of Si at the same voltage. Also values of 1/20 to 1/30 are mentioned. Present enhancement MOSFETs achieve already < 10 mOhms at 1200 V from several firms which is only the beginning. JFETs attain already Rdson's far below 10 mOhms.

The production of SiC parts is more complex, more expensive and requests additional investment, e.g. high-temperature chambers, high energy and high temperature (> 500 C) ion implantation equipment. When handling hot ions customary photomasks can not be used because they only take < 200 C¸more durable materials like SiO2 are necessary. It takes more time to manufacture such hard masks. First, the material must be deposited, then it has to be defined by photolithography, then it has to be etched. The next difficulty is the fairly low diffusion coefficient of most atoms into SiC, especially for customary materials like aluminum, phosphorous, and nitrogen. Therefore the implantation process has to be repeated several times at different energy levels, up to ten times.

Apart from the high price tag for epitaxial wafers (2 orders of magnitude higher than for Si wafers) the process is complicated and lengthy, and it requires special investments.

• All sources unanimously predict that the prices of SiC parts will never reach the prices of Si parts. However, it is wise to be cautious with such comparisons, because SiC chips are much smaller than comparable Si chips.
• Comparisons of prices just of parts are misleading. Only complete circuits can be compared. SiC excels in high temperature, high voltage applications and is thus ideal e.g. for the harsh automotive environments. It is clearly superior to GaN.

 

SiC will replace Si IGBTs because it allows much higher operating frequencies and temperatures as well as savings in inductive and capacitive components. Also, it is much more robust than silicon parts, an important argument in automotive applications. Whether the SiC IGBTs being developed make sense when the Rdson's of the JFETs and MOSFETs are so low is questionable. In offline SMPS SiC will probably outperform Si from several hundred watts upwards. GaN is rather a low voltage material, its niche is < 100 V.

With all semiconductors not only the material but also the crystal structure have a great influence on the properties. Of the about 200 various crystal structures shown in Figure 7.6 only a few are used, for SiC this is 4HC. 

 

Figure 7.6: Table of the most important substrates for the new materials.

 

The 7 x higher breakdown field strength recommends SiC also for > 3 KV components in solar and wind generator inverters in addition to electric vehicles, those are the 3 most important growth markets.

 

7.2 SiC Diodes

Although the yield has been improved SiC wafers are still much smaller than e.g. Si wafers. This is the reason why few chips > 10 A are available. Higher currents are handled by the parallel connection of chips which is possible due to the positive TC.

With Si only socalled "pure" Schottky diodes can only be made up to 100 V. There are 200 V Schottkies the value of which is doubtable. Schottkies also have disadvantages vs. Si Ultrafast diodes, e.g. a markedly higher capacitance and higher leakage currents. The discharge current looks similar to a reverse recovery current. SiC Schottkies have no reverse recovery time, and their losses do not increase with temperature which is perhaps their most important advantage. Their capacitance is 5 x that of GaAs diodes, but the latter never reached their popularity. Due to their positive TC they are sensitive to overloads because the losses rise.

 

Figure 7.7: Structure of a SiC diode. The diode is constituted by the metal-semiconductor contact, hence it is a Schottky diode with the known advantages. However, the forward voltage is quite high, most diodes are 600 V types with 1.5 V, following the general rule that the forward voltage rises with the blocking voltage.

 

The main application was sofar in PFC's, manufacturers obviously could not imagine other applications. In fact even the standard 600 V diodes outperform Si ultrafast diodes whereever a transistor switches hard onto a conducting diode, e.g. in the secondaries of flyback converters. (See the article in Bodo's Power Nov. 2009). The 600 V diodes outperform Si ultrafasts even down to output voltages of about 25 V.

Similar to many GaAs diodes a pn diode is integrated in parallel to the SiC diode. The pn diode starts to conduct at high currents resp. a forward voltage of about 4 V and thus protects the "pure" SiC diode. 

 

Figure 7.8: "Pure" and 2nd generation SiC diodes with integrated pn diodes.

 

7.3 SiC Power Transistors

Many years of production experience with diodes reduced wafer defects and created a solid base for the introduction of SiC power transistors. The "natural" transistor and first choice is a JFET, firms like Semisouth (defunct)and initially also Infineon and all firms which offer cascodes (e.g. USCI) voted for JFETs. Firms like Infineon, Rohm, Microsemi etc. now prefer enhancement MOSFETs. One company, Transic (Fairchild), made BTs. Also, IGBTs are being developed. Designers of power electronics had to become familiar with JFETs.The necessity of a negative gate supply that has to be available before turn-on limits the usefulness of JFETs to such power supplies which feature an auxiliary supply and to cascodes.

In power applications SiC is in principle superior to GaN, SiC transistors have been on the market for many years. In high voltage applications, SiC beats GaN hands down: while even the first SiC transistors, more than 10 years ago, were specified for 1200 to 1700 V GaN has been stuck at 650 V; only recently one firm ventured to specify 1200 V. The problem is that this can not be tested because the tests are destructive. Another advantage of SiC is the vertical structure while most GaN transistors are fabricated on Si substrates so they are lateral. While GaN transistors are destroyed by a single overvoltage pulse, SiC MOSFETs are expected to achieve an avalanche rating. JFET cascodes can be made avalanche-proof, see below.

 

Figure 7.9: The characteristics of "pure" and 2nd generation SiC diodes show the takeover of the current by the parallel pn diode, protecting the former. Without the protection, the SiC diode would be destroyed by excessive power dissipation.

 

7.3.1 SiC JFETs. Although the natural type of transistor with SiC and GaN is the JFET it is difficult to use in power supplies because JFETs are depletion types, i.e. fully on with 0 V of gate voltage. At turn-on of supply it presents a short circuit, hence it is only usable in a cascode where a standard Si MOSFET ensures high impedance at turn-on. Combined with the other advantages of cascodes like very fast switching and low input capacitance, these cascodes as made by USCI are excellent choices. It is hard to understand why major firms insist on MOSFETs.

 

Advantages of JFETs:

1. Of all transistor types JFETs are the easiest to produce.

2. Lower Rdson's than MOSFETs.

3. Lower switching losses due to lower capacitances. Tests of single JFETs, i.e. not cascodes, did not show faster switching than Si Coolmos.

4. Lower losses due to lower Rdson than Si or MOSFETs.

5. Best suited for high voltages, from 1200 V upward.

6. Continuous operation at 250 C, provided the case can take this temperature.

7. No increase of losses with temperature.

8. Due to the high thermal conductance, the thermal resistance remains low in spite of smaller chips.

9. No parasitic elements, no SBD, no dv/dt limits, no antiparallel diode.

 

Disadvantages:

1. JFETs are by nature depletion type, i.e. with 0 V on the gate they are fully on. In order to turn them off a negative voltage has to be applied to the gate which exceeds the pinch-off voltage. Consequently, the gate drive is between 0 V and the pinch-off voltage which does not fit with standard ic's and their positive power supplies.JFETs can not be used as switching transistors in power supplies because that would require a negative supply which is available before turn-on. Hence JFETs can only be used in cascodes.

2. No avalanche rating, in cascodes possible, see below.

3. The gate is isolated from the channel by a pn diode. If the gate voltage exceeds 0.6 V, the diode will conduct so that the gate input becomes low impedance. With mosfets the gate is isolated with glass, SiO2 and high impedance with any positive or negative voltages below the maximum specified voltages. Figure 7.10: Structure of a SiC trench JFET. Like with any JFET there are diodes between gate and channel and drain and channel. At 0 V gate voltage the channel is already fully conducting. If the gate voltage is increased to about 0.6 V, the diode will be on, and the gate input becomes low-impedance. If the drain current is increased the drain potential will rise. If it rises above the threshold voltage, e.g. 6 V, the channel starts to pinch off so that the current can not rise further.

 

Figure 7.10: Structure of a SiC trench jfet. Like with any jfet there are diodes between gate and channel and drain and channel. At 0 V gate voltage, the channel is already fully conducting. If the gate voltage is increased to about 0.6 V, the diode will be on, and the gate input becomes low-impedance. If the drain current is increased the drain potential will rise. If it rises above the threshold voltage, e.g. 6 V, the channel starts to pinch off so that the current can not rise further.

 

The best switches are the SiC cascodes with JFETs which are available from several firms, they are superior to the MOSFETs supported by major manufacturers and free from their problems. They do not ask for high drive voltages close to the maximum gate voltages nor do they need a negative gate voltage. < 10 mOhms at 1200 V and < 7 mOhms at 650 V are state-of-the-art. As the lower transistor in the cascode is a standard Si MOSFET, 12 V drive is sufficient. This Si lv MOSFET contributes < 1 mOhm to the total Rdson of the cascode

Regarding the avalanche properties, there is a significant difference between SiC and GaN: The manufacturer USCI specifies an avalanche rating for its SiC cascodes. USCI makes use of an old protection circuit known from bipolar e.g. in combustion engine spark generators. If the maximum drain voltage is exceeded a normal - non-destructive - diode breakdown will occur in the JFET. If sufficiently high resistance is inserted in the gate of the lower MOSFET, this leakage current will develop a voltage across the resistance which will eventually turn the cascode on, so it will damp the overload. The drain voltage remains almost constant, see Figure 7.11.

• Obviously this method is not applicable to GaN transistors because they are destroyed in the breakdown.

 

Figure 7.11: Avalanche behavior of USCI cascodes. The cascode is turned on by the leakage current of the JFET, damping the overload.

 

While GaN transistors were limited to 100 to 200 V for a long time, 600 V types came later, 1200 V types were announced for years, but did not come forward. even the first SiC transistors were specified for 1200 to 1700 V. They will replace many Si IGBTs alone because they allow much higher operating frequencies. Higher power cars use already 800 V supplies. The question is rather whether the semiconductor industry will b able to deliver high volumes of SiC. The manufacturers of Si IGBTs came up with the 7th generation. The intrinsic advantage of IGBTs: their saturation voltage rises very little with the current. Fets are resistors so the losses rise with the square of the current. SiC transistors can compete due to their extremely low Rdson's even at 1200 V. Si IGBT's profit from the fact that there are no Si wafer supply problems to be expected.

Information relating to the internal structure of their JFETs was only available from Semisouth (now defunct) so it is given here as an example.

 

Figure 7.12: Structure of Semisouth JFETs. It is purely vertical, the current flows from the bottom contact to the drain and through the drift zone to the source. The gate is covered with SiO2 in the valleys.

 

Figure 7.13: Comparison of Semisouth's JFET with that of a competitor.

Other firms showed only samples and some data on exhibitions but neither disclosed more information nor were samples or documentation available. Most firms only offer cascodes, single JFETs are presently only available from USCI. The author had an intense correspondence with Semisouth and Cree. Samples in TO-247 were tested in a 200 W offline supply vs. Coolmos. At an operating frequency of 125 KHz only a modest improvement of the efficiency was noted. In cascode, the improvement was marked, but as well with the SiC and the Si Coolmos transistors.

 

 

An important application of JFETs, either single or in cascodes, is in bridge circuits because they allow current flow in both directions.

In contrast to the use of MOSFETs, there are no parasitic elements involved. The inverse diode of the lower lv Si MOSFET is very fast.

 

 

Figure 7.15: Elements of a SiC JFET.

 

The arrows indicate that all capacitances shown are voltage-dependent V-1/2. Like all fets, these have a TC = 0 point where the increase of the on-resistance with temperature matches the negative gate voltage characteristic of - 2.3 mV/degree.

 

7.3.2 SiC MOSFETs

Heavyweights like Infineon, Cree (Wolfspeed), Rohm, Microsemi voted for enhancement MOSFETs. The reasons are unclear, because the JFET cascodes, as mentioned, are clearly superior in every respect. Patent problems are unlikely because the cascode is known for about 80 years.

Ideally they should be usable in place of Si MOSFETs, but this goal was not achieved: the drive levels are - 5 to + 22 V, and these voltages are close to the maximum permissible voltages which are typical - 6 /+ 23 V. It is good engineering practice to stay away from the limits. The supporters of enhancement transistors, in the early days, when asked by the author if their transistors did not also need - 5 V, first denied this but later had to concede that this was indeed necessary. With standard MOSFETs and Coolmos 12V is enough and comfortably far below the +- 20 V maxima.

Looking at the specs quite a few peculiarities come up. SiC takes easily Tj >=250 C, but some types are only specified for a maximum Tj = 125 C while all Si transistors in the same case types take 150, some even 175 C. SiC should take >= 250 C continuously.

A maximum gate voltage of +23 ...+ 25 V is specified while a gate drive of 22 V is required. Also - 5 V is required while the maximum is - 6 V. This means that 0 V are obviously not adequate for keeping the parts off. Before turn-on no negative gate supply is available. How critical this is follows from the manufacturer's warning that the gate voltage must not overshoot. This rises another question: why - 6 V/ + 25 V? Allegedly it is the same gate oxide which is used in Si parts.

Then why is the maximum voltage here unsymmetrical? This question could not be answered by the firms. That the max. - 6 V are no kidding is proven by tests in cascode: all samples were destroyed. As no standard MOS driver ic can deliver - 5 to + 22 V, one firm specified an expensive single-source driver with 0.6 Ohms and 14 A peak current. Probably these high drive levels are specified in order to squeeze the Rdson as mosfets are inferior to JFETs.

With SiC MOSFETs a leakage current between gate and channel is not possible, hence the protection scheme used with the cascodes is not applicable. Due to the structure similar to Si MOSFETs probably also a parasitic NPN exists with the danger of SBD. The author could not get any information about this. The manufacturers of Si MOSFETs proclaimed for years that their products were free from SDB until independent experts proved the contrary. One SiC manufacturer gave a "single pulse rating" , two more promised such ratings. However, such a spec is useless in practice, if a part fails it can never be proven that the single pulse rating was exceeded.

So the mosfets do not provide any advantage over the JFET cascodes, and it remains the secret of the firms proclaiming them why. The author does not use them.

 

7.3.3 SiC BTs

Transic (Fairchild) announced 2011 a SiC BT. This created some astonishment because BTs are considered obsolete. In fact, all major firms discontinued their production. However, this might be a product with some future, because BTs do have some advantages: the small and inexpensive chips, the simple process. This product was similar to the obsolete high voltage Si BTs. In contrast to those this SiC BT has a markedly higher beta. Another BT advantage is the low saturation voltage which increases only moderately with the current and its low TC. 2013 technical data were released, but whether this product came ever on the market is not known.

"Lowest losses on the market, lowest Rdson < 2.2 mOhms x cm2 at 25 C."

Further specs were: 1200 V, 40 A, Tjmax = 175 C, Vce at 40 A: 1.6 V (vs. 3 V with IGBTs), switching times 20 ns, not dependent on temperature, no "current tail", no SDB, short-circuit proof, low leakage, positive TC, can be connected in parallel, Rsat, 125 C = 40 mOhms.

 

Figure 7.16: Characteristics of the Fairchild SiC BT at 150 C. There is hardly a saturation voltage visible, in contrast to an IGBT. The difference at 40 A is impressive.

 

7.4 SiC Drive Circuits

SiC cascodes use a standard Si MOSFET so their drive is identical to any Si MOSFET: + 12 V.

Of all power transistors, SiC MOSFETs are the hardest to drive, also their capacitances are quite high and comparable to Si MOSFETs. The - 5/+ 22 V needed by most are beyond the output levels of standard control/driver chips and their positive supply voltages.

Before turn-on of a power supply no - 5 V is available unless an auxiliary supply is provided. This is already a serious drawback. The + 22 V drive level also requires an uncommon + 22 V supply. But even if this is available, the designer will need one of the rare and expensive, mostly single-source special driver chips for SiC MOSFETs. Due to the rather high capacitances, these chips must deliver high peak currents. Overcurrent and desaturation control are as a rule provided. External Schottky clamping diodes are necessary from the gate to the minus and plus supplies.

Decoupling should consist of an MLCC of e.g. 0.1 uF directly at the pins in parallel to a 10 uF MLCC. Note that these capacitors must not be used above ½ of their nominal voltage. Or the designer makes his own driver. Here it can be wise to use a transformer in conjunction with a standard control ic. If the control ic's output can not deliver enough current it may be necessary to add a high current driver.

 

In the next article of this series, we will analyze GaN Transistors. 

About the Author

Dr.-Ing. Artur Seibt is a professional electronics design lab consultant with a specialization in SMPS with 40 yrs. experience incl. SiC, GaN, D amplifiers. The inventor of current-mode control (US Patent) and He is also an expert in EMI design.

 

This article originally appeared in the Bodo’s Power Systems magazine.