Gate Driver Solutions for Si, SiC, and GaN

This article is published by EE Power as part of an exclusive digital content partnership with Bodo’s Power Systems.

Isolators are used today in a wide range of applications, from telecom and server switch-mode power supplies (SMPS) [1] to solar inverters, industrial AC motor drives, and EV charging. They are primarily used to offer the required protection from injury and electrical shock to the operators interfacing with HMI or connectors, as well as safeguard sensitive and expensive low-voltage components, such as controllers, against failures in the high-voltage power stage [2].

Often isolation is used to interrupt disruptive ground loops, eliminating displacement currents and high-frequency noise injected back into the control units.

Digital isolators and isolated gate driver ICs have become the technology of choice in the market thanks to their unquestionable benefits compared to traditional solutions such as pulse transformers [2] and optocouplers.

 

Table 1. Product overview of the new and previous generations of the EiceDRIVER™ 2EDi product family. Image used courtesy of Bodo’s Power Systems [PDF]

 

This article presents the features and benefits of the new EiceDRIVER 2EDi family of dual-channel isolated gate driver ICs. The new generation features DSO 14-pin packages for extended channel-to-channel creepage, dead-time, and shoot-through protection, faster start-up time, robust isolation technology meeting the latest isolation standards (VDE 0884-11, IEC 60747-17), as well as small LGA 4x4 packages enabling 36 percent space saving in low-voltage applications. With multiple under-voltage lockouts (UVLO) variants, package options, and isolation levels, this family meets most design needs in several applications for the different switch technologies (see Table 1).

 

Isolation Technology With MFI and CMTI

The new EiceDRIVER 2EDi generation exploits magnetic isolation with proven Infineon’s Coreless Transformer (CT) technology. A repetitive working voltage of 1767 VRMS is ensured over 20 years lifetime, fulfilling the time-dependent dielectric breakdown (TDDB) requirements of VDE 0884-11 and IEC 60747-17, the latest component standard for magnetic and capacitive couplers.

A proprietary double coil on-chip transformer also ensures high magnetic field immunity (MFI), fulfilling the most stringent test levels according to IEC 61000-4-8, IEC 61000-4-9, ISO 11452-8, and MIL-STD-461G-RS101 standards. It also provides an excellent common-mode transient immunity (CMTI) of more than 150 V/ns, fundamental for driving wide bandgap devices (WBG) such as SiC and GaN.

 

Robust Insulation in Overstress Scenarios

The robustness of the insulation in overstress scenarios is often of concern, particularly when it comes to potential failure and damage of the power stage across the reinforced isolation barrier.

Figure 1 depicts one of the worst-case scenarios, i.e., when the EiceDRIVER 2EDRx259X galvanic isolated gate drivers are used in an LLC topology, and one power switch fails with a gate-drain short circuit while the other is conducting.

 

Image used courtesy of Bodo’s Power Systems [PDF]

Figure 1. A critical EOS event in the power stage that could break the isolation barrier Despite the high energy injected into the driver (up to 600 A current flowing into OUT_A until bond-wire evaporation and package explosion), the EiceDRIVER™ 2EDRx259H guarantees the fully reinforced isolation integrity. Image used courtesy of Bodo’s Power Systems [PDF]

 

Without a protection diode between the driver output and its ground, a significant amount of energy is transferred from the bulk capacitor (680 µF in this example) directly into the driver leading to electrical failure of the output chip ChA and package destruction with open bond wires. The EiceDRIVER™ 2EDRx259X ensures total isolation even after high electrical overstress, thanks to the robust insulation built on the primary-side chip. Competitors 2 and 3, using a capacitive isolation technology, fail the Hi-Pot test after EOS stress.

Table 2 shows the summary results of the Hi-Pot test at rated VISO voltage after EOS stress.

 

Table 2. Isolation robustness against output-side EOS after Hi-Pot test at rated V_ISO.

Product	Pass high-voltage - Hi-Pottest* after EOS stress
2EDRx259X/H	Yes
Competitor 1	Yes
Competitor 2	No
Competitor 3	No

*V_ISO = 5700 V_RMS for t = 60 sec, V_ISO = 5000 V_RMS = for competitors 1, 2 as per datasheet specification

 

UVLO Timing

A bootstrap circuit is often used to supply the high-side MOSFET due to its simplicity and low cost. However, it can hide several complications because, by nature, the bootstrap supply and the low-side supply are unavailable during start-up. Consequently, the supply voltage in the high-side channel becomes available after some delay, depending on the size of the bootstrap capacitor and resistor.

Many gate driver ICs on the market show a UVLO start-up time in tens of µs (left of Figure 2), meaning several high-side pulses are skipped while the low-side MOSFET turns on and off in normal operation.

This can lead to several consequences, e.g., it can create unbalance in the two resonant capacitors of an LLC topology. If not properly controlled, this can generate severe hard commutation issues. On top of that, it can create voltage asymmetry on the main transformer with a saturation of the core. The new EiceDRIVER 2EDi generation features an industry benchmark UVLO start-up time lower than 2 µs ensuring high-side activation in less than one pulse (Figure 2).

 

Image used courtesy of Bodo’s Power Systems [PDF]

Figure 2. UVLO start-up time of a competitor driver with slow bootstrap channel activation (top) vs. the new EiceDRIVER™ 2EDi with the fastest output-side activation time (bottom). Image used courtesy of Bodo’s Power Systems [PDF]

 

Active Output Clamping

Another potential issue hidden in the bootstrap system can arise when induced noise on the high-side gate is not effectively clamped by the driver that is still “inactive,” being the charging bootstrap supply below the UVLO level.

One example is the start-up in LLC with split resonant capacitors (see Figure 3). If no special start-up sequence is considered, the high-side MOSFET is off until (and after a certain delay) the bootstrap supply approaches the UVLO, creating voltage unbalance on the resonant capacitor and an unwanted change of the switching node (in green). Each negative dV/dt of the switching node charges the gate of the high-side power switch (in magenta) via the Miller effect.

The EiceDRIVER 2EDi generation includes a special active clamping circuit to quickly clamp the output noise even if the channel is inactive (output supply below UVLO), thus avoiding dangerous shoot-through events, as shown in the right-hand side measurements of Figure 3.

 

Image used courtesy of Bodo’s Power Systems [PDF]

Figure 3. A critical shoot-through when using a driver with a slow output clamping for supply below UVLO (top). The outperforming clamping behavior of the new generation of EiceDRIVER 2EDi gate driver ICs (bottom). Both measurements are related to a start-up condition in an LLC circuit with split resonant capacitors and with bootstrap. Image used courtesy of Bodo’s Power Systems [PDF]

 

Timing and Dead-Time Control

The new EiceDRIVER 2EDi generation includes features that fulfill the needs of fast-switching applications employing WBG devices. Excellent propagation delay matching and dead-time accuracy (see Table 3) ensure perfect timing synchronization of the gate signals (e.g., in diagonal driving) and dead-time optimization with huge benefits on system reliability and efficiency performance.

 

Table 3. Tight timing specifications enable WBG driving.

Feature	Values
Part-to-part propagation delay turn-on	6 ns (max)
Part-to-part propagation delay turn-off	8 ns (max)
Ch A-to-Ch B turn-on propagation delay mismatch	-4 ins - 4 ns
Ch A-to-Ch B turn-off propagation delay mismatch	-5.5 ns - 3 ns
Channel turn-off to turn-on prop. delay mismatch	-5 ns - 1 ns
Pulse width distortion	-5 ns - 5.5 ns

 

Furthermore, important second-level safety mechanisms are configurable shoot-through protection (STP) and dead-time control (DTC) built into the gate driver IC hardware.

The EVAL_2EDB_HB_GaN evaluation board (Figure 4) combines an EiceDRIVER 2EDB8259Y dual-channel isolated gate driver with Infineon’s discrete GaN HEMTs. This board allows testing in different operating modes and with different driving supply approaches (unipolar or bipolar, isolated or non-isolated with bootstrap).

The test results obtained with gate injection transistor (GIT) HEMTs demonstrate a reliable operation at MHz and kW range [3]. The board also includes a flexible bias supply configurable for bipolar or unipolar operation with different voltage levels and an option for one percent voltage regulation, which is particularly important while driving Schottky gate (SG) GaN HEMTs. Detailed information about a universal gate driving circuit for both 650 V GIT and SG GaN HEMTs is described in [4].

 

Figure 4. EVAL_2EDB_HB_GaN CoolGaN GIT HEMT half-bridge evaluation board. Image used courtesy of Bodo’s Power Systems [PDF]

 

The EiceDRIVER 2EDi generation combines the benefit of robust isolation technology with outstanding electrical parameters. The features of this new product family can support system requirements to achieve high efficiency and reliable operation over a wide temperature range and with a longer lifetime.

Infineon’s broad product portfolio includes different packages and isolation ratings, providing a comprehensive offering adapted to the needs of different application use cases and topologies.

For a deeper understanding of the EiceDRIVER 2EDi generation, delve into the wealth of information provided in the dedicated application notes [3] and product webpage.

 

References

1. Infineon Technologies AG, “Using the EiceDRIVER 2EDi product family of dual-channel functional and reinforced isolated MOSFET gate drivers,” Application Note v4.0, March 2022, AN_1805_ PL52_1806_095202, March 2022, [Online] https://www.infineon. com/cms/en/product/power/gate-driver-ics/dual-channel-isolated-gate-driver-eicedriver-2edi/#!?fileId=5546d46267354aa00167 5a431da84a41

2. D. Varajao, C. Menditti Matrisciano, “Isolated gate driving solutions – Increasing power density and robustness with isolated gate driver ICs,” Infineon Technologies AG, Application Note v1.1, AN_1909_PL52_1010_201256, June 2022, [Online] https://www. infineon.com/cms/en/product/power/gate-driver-ics/dual-channel-isolated-gate-driver-eicedriver-2edi/#!?fileId=5546d462700c 0ae60170a0c4af851028

3. C. Menditti Matrisciano, “Half-bridge evaluation board designed with CoolGaN™ GIT HEMTs and EiceDRIVER 2EDB8259Y,” Infineon Technologies AG, Application Note AN_2210_ PL21_2211_151906, November 2022, [Online] https://www. infineon.com/cms/en/product/power/gate-driver-ics/2edb8259y /#!?fileId=8ac78c8c8412f8d3018450d16dcf4eb8

4. C. Menditti Matrisciano, A. Laneve, and D. Varajao, “Universal Isolated Gate Driving Platform for 650 V GaN HEMTs Half-Bridge with Dead-Time Control and Integrated Bias Supply,” PCIM Europe 2023; International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, Nuremberg, Germany, 2023, pp. 1-9.

 

This article originally appeared in Bodo’s Power Systems [PDF] magazine and is co-authored by Carmen Menditti Matrisciano and Dr. Diogo Varajao of Infineon Technologies.