Gate Drive Optocouplers for GaN Power DevicesJuly 23, 2018 by Robinson Law
This article discusses Gallium Nitride Technology and wide variety of designs of different competing companies.
Gallium Nitride (GaN) power devices are gaining popularity over Silicon power devices as its faster switching capability can improve overall system efficiency and reduce the size and costs. The technical benefits coupled with lower costs due to the increase in GaN production have increased its adoption in applications like industrial power supplies and renewable energy inverters.
Broadcom Inc. (formerly Avago Technologies) gate drive optocouplers are used extensively in driving Silicon-based semiconductors like IGBT and Power MOSFETs. Optocouplers are used to provide reinforced galvanic insulation between the control circuits and the high voltages. The ability to reject high common mode noise will prevent erroneous driving of the power semiconductors during high-frequency switching. This paper will discuss the benefits of GaN, its gate drive requirements, the gate drive designs, tests, and performance.
Benefits of GaN
Gallium Nitride is a wide bandgap (3.4 eV) compound made up of Gallium and Nitrogen. Bandgap refers to the region formed at the junction of materials where no electron exists. Wide bandgap GaN has high breakdown voltage and low conduction resistance. It has higher electron velocity and lower parasitic capacitance which improves its switching speed.
The benefits of GaN over Silicon can be summarized into 3 main points:
- Smaller system designs
- Lower system costs
- Higher system efficiency
Figure 1. Silicon vs. GaN. GaN systems are smaller with lower system costs.
The smaller and lower costs are results of fewer and smaller peripheral components. GaN can operate in reverse conduction mode which can eliminate external freewheeling diode. It can operate at high frequency which results in smaller filters and magnetics like inductors and transformers. GaN operates 60°C cooler than Silicon which will help to reduce the size of the heat sink.
Figure 2. Silicon vs. GaN. GaN shows higher system efficiency.
Higher efficiency is the result of lower switching and conduction loss. GaN has higher electron velocity and lower parasitic capacitance for low switching loss. It is also smaller in size than Silicon at the same breakdown voltage and hence lower conduction resistance.
Figure 3. Types of GaN and gate drive requirements
Figure 3 shows the different types of GaN and their gate drive requirements. Brand E, for example, manufactures 200V GaN, used mainly for low voltage applications like 12V DC-DC converters. Brand T manufactures 600V GaN but is a normally-on switch. It requires a low voltage Silicon MOS in cascode connection to turn it into a normally-off switch which will be safer to use. Due to the cascode structure, the switching speed cannot be controlled by adjusting the gate resistance. This will lead to complications in fine-tuning the EMI (electromagnetic interference) and switching loss.
Panasonic and GaN Systems manufactured normally-off switches by using P-type barrier structure under the gate to deplete the high mobility electrons during 0V gate bias. Due to the high electron mobility, the threshold of GaN, VTH is relatively lower than that of Silicon MOS or IGBT. The input capacitance is also very small, less than 1nF and only requires 5nC to switch on.
GaN switches very fast and care should be taken when designing with a high switching dv/dt. It is important to control the high dv/dt noise coupling from the GaN to the gate driver.
Otherwise, it is required that the gate drivers must have a noise immunity of more than 100kV/μs to prevent false switching of the GaN.
Since GaN devices from Panasonic and GaN Systems are normally off and easy to use, the gate drive requirements are very much similar to Silicon MOS. Panasonic GaN has a robust gate, which allows a high gate voltage of 12V for fast turning on of the gate. GaN Systems recommends 6V to charge the gate. Due to the small gate capacitance and gate charge needed, the gate current needed is relatively low at less than 1.5A.
For Panasonic GaN, one thing to take note is that the gate requires DC holding current of approximately 10mA to maintain it in “ON” status. For GaN Systems, special care is needed to ensure the absolute maximum gate voltage of 7V is not exceeded.
Gate Drive Design for Panasonic GaN
Figure 4 shows a half bridge evaluation board featuring Panasonic 600V 70mΩ X-GaN transistor, PGA26E07BA. The gate drive is designed using two gate drive optocouplers, ACPL-P346 to drive the GaN transistor directly.
Figure 4. Half-bridge evaluation board with Panasonic GaN and ACPL-P346
The ACPL-P346 is a basic gate driver optocoupler used to isolate and drive the GaN operating at high DC bus voltage. It has a rail-to-rail output with 2.5A maximum output current to provide fast switching high voltage and driving current to turn-on and off the GaN efficiently and reliably. The ACPL-P346 has a maximum propagation delay times of less than 110ns and typical rise and fall times of around 8ns. The very high CMR, common mode rejection of 100kV/μs(min.) is required to isolate high transient noise during the high-frequency operation.
Figure 5 shows the schematic of the half-bridge evaluation board and the ACPL-P346 gate drive design. The GaN transistors, QB and QA, would require about 12.5mA on-state current to continuously bias the transistor in on-state. This is done by the gate driver through 680ohm resistors RB1 and RA1.
Figure 5. Schematic of half-bridge evaluation board with Panasonic GaN and ACPL-P346
The initial in-rush charging current to switch on the GaN quickly is provided by ACPL-P346 and the peak current limited by resistors RB2 and RA2. Capacitors CB3 and CA3 are used to turn on the GaN faster by increasing the charging current momentarily. The board has the flexibility to be powered by 2 isolated DC-DC supplies for the top and bottom bridges or 1 DC-DC with bootstrapping.
Gate Drive Design for GaN Systems GaN
Figure 6 shows another half bridge evaluation board featuring GaN Systems’ 650V E-HEMT GS66508T (30A/50m Ω) GaN transistor. The half bridge evaluation board uses two gate drive optocouplers ACPLP346 to drive the GaN transistors directly. The schematic shows the bottom bridge gate bias and driver circuit. The top bridge uses the same circuitry. The isolated DC-DC, 5V-10V converters are used to provide +6V and -4V bipolar gate drive bias for more robust gate drive and better noise immunity. The 10V is then split into +6.2V and -3.8V bias by using a 6.2V Zener diode. The ACPL-P346 gate drive output is a combination of 10Ω gate current limiting resistor (for charging) and 10Ω paralleled with 2Ω plus a diode for discharging.
Figure 6. Half-bridge evaluation board with GaN Systems GaN and ACPL-P346
Figure 7. Schematic of ACPL-P346 gate drive circuit for GaN Systems half bridge evaluation board
GaN Half Bridge Evaluation Board Test and Performance
Using the half-bridge evaluation board from Panasonic and GaN Systems, the slew rate, switching power loss and efficiency tests were performed on the GaN and ACPL-P346.
Figure 8. Slew rate and switching power loss test setup and waveforms
An inductor of about 120 to 160μH was connected between VDC+ and VSW to form the boost configuration also known as low side test. The low side GaN transistor Q2 was active in boost mode. 400V Bus voltage was applied to VDC+/VDC-. Double pulse test was used for easy evaluation of device switching performance at high voltage and current without the need of actually running at high power.
Figure 9. Panasonic GaN and ACPL-P346 slew rate test
Figure 10. GaN Systems GaN and ACPL-P346 slew rate test
The period of first pulse TON1 applied to Q2 defined the switching current ISW. t1 (turn-off) and t2 (turn-on) were the measurement points as they were the hard switching transients for the half bridge circuit when Q2 is under high switching stress.
The slew rate tests were conducted at 400V DC and around 30A hard switching.
The Q2 turn-on and off slew rates (dv/dt) were measured at t1 (turn-off) and t2 (turn-on) respectively. The highest slew rates of more than 110kV/μs were measured when the GaN hard turned off at 400V, 30A.
ACPL-P346 has a minimum CMR, common mode rejection of 100kV/ μs. In other words, ACPL-P346 can isolate high transient dv/dt noise from the GaN switching. The scope pictures show the GaN fast slew rates were not affecting the gate drive outputs and gate voltages.
Figure 11. Switching power loss test setup and waveforms
The switching loss test used the same boost configuration with a current sensor installed for ID measurement. The same double pulse signals and timing of the slew rate test were used for the power loss measurement. The measurement was done at the monitoring points when the GaN turned on or off at the target current level. The math function on oscilloscope was used to find the multiplication of VDS and IDS. The measure function on the oscilloscope was then used to find power loss which was the area under the curve.
Figure 12. Switching power loss measurements
The turn-off power losses are represented by the red line and both GaN power losses were kept below 15μJ regardless of inductor load current. The turn on power losses are represented by the blue line, both GaN show a low loss of around 40μJ at 15A.
Figure 13. Efficiency test setup
The half bridge evaluation boards were connected as DC-DC converters to test the efficiency of GaN in hard switching operation. The Panasonic GaN DC-DC was connected in boost 200V to 380V configuration while GaN Systems DC-DC was connected in buck 400V to 200V configuration (Q1 turned on to charge the inductor, and turned off to allow inductor current to continue discharging through output capacitor and through Q2 as a freewheeling diode). Both converters were operated at 100 kHz frequency, room temperature and the efficiency at different power tested.
Both converters showed high conversion efficiency of approximately 99%.
About the Author
Robinson Law works as the Applications Engineer at Broadcom Limited. He has been responsible for the application support for Broadcom's Optocoupler products in industrial design-in activities since he joined the company in 2001. He also takes care of the product marketing for Hall-effect current sensors. He graduated from the University of Malaya in 1984 holding a Bachelor’s degree in Electrical Engineering.
Tee Chun Keong started his career with Avago Technologies in 2006 as an application engineer in the Isolation Products Division. He is now the Broadcom Inc. worldwide product manager for gate drive optocouplers and is involved in the new product development and market expansion. He holds a bachelor's degree in electrical engineering from Singapore's Nanyang Technological University.
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- “ACPL-P346 Panasonic X-GaN Transistor PGA26E07BA Half Bridge Evaluation Board”, Broadcom Inc., ACPL-P346-X-GaNRM100.
- “ACPL-P346 GaN Systems GaN E-HEMT GS66508T Half Bridge Evaluation Board”, Broadcom Inc., ACPL-P346-RefDesign-RM101.
- “PGA26E07BA Datasheet”, Panasonic Semiconductor.
- “GS66508T Top-side cooled 650 V E-mode GaN transistor Preliminary Datasheet”, GaN Systems.
- “GN001 Application Guide Design with GaN Enhancement mode HEMT”, GaN Systems.
This article originally appeared in the Bodo’s Power Systems magazine.