Modular Real-Time Development Platform for Power Electronic Systems

Julian Endres, Fabian Bayer, Andreas Linke and Ansgar Ackva at TTZ-EMO - University of Applied Sciences Würzburg-Schweinfurt

FPGAs provide impressive computing power, which is increasingly required in power electronic systems. A modular rapid prototyping system based on an FPGA with individual expansion cards is the basis for the implementation of a wide range of high-performance power electronic R&D projects.


The Necessity of Algorithms in Power Electronics

As today’s power electronic systems move to more complexity and higher dynamics it is essential for the control platform to keep up with this trend. Modern power electronics is useless without algorithms. Multi-level inverters, for example, provide lower THD and enable a reduction of passive components but in contrast need increasing efforts for gate drivers and signal transmission. Changing from a two-level to a five-level inverter equals at least a quadrupling of the involved active components. However, the complexity does not just apply to the hardware, but also to the algorithm for generating the switching pulses.

Another example, model predictive control (MPC), requires extensive algorithms as well. It is used to overcome the disadvantages of common linear control algorithms. Here, the effect of each possible switching operation is precalculated on-line for several prediction steps, which in turn requires a high computing power. With novel, fast-switching semiconductors (e.g. SiC, GaN), the computing platform used for generating the pulse width modulation (PWM) pattern is also confronted with higher requirements as carrier frequencies rise. Selected microcontrollers have PWM or even space vector modulation (SVM) cores implemented in hardware already, however with the disadvantage that no significant changes can be made to them. This is not satisfying for R&D purposes, especially if the modulation scheme is to be modified.


FPGAs as a Central Control Unit

Because of the aforementioned challenges, it is worth considering an FPGA as the central control unit for the power electronic system. FPGAs usually provide a high IO-pin count that allows connections of extensive topologies with all their different control and protection signals. Since FPGAs imply programmable logic they are best suited for paralleling algorithms in order to boost computation speed for dedicated partitions. Ordinary procedural programming can be used as well by implementing a microcontroller as softcore into the FPGA. Recent progress in model-based code generation (e.g. by means of MathWorks HDL Coder) greatly facilitates the rapid prototyping implementation of desired algorithms. This not only enables easy and complete system-simulation and validation but also simplifies getting started for FPGA newcomers.

Today there are several real-time control platforms available on the market. For control and power electronic use-cases most of them lack in:

  • Re-usability: Re-using one control-platform type for various projects succeeds in few cases only because of different hardware requirements
  • Performance: The performance is crucial for R&D projects in order to be able crossing the border of state of the art setups and look ahead to what’s probably off-the-shelf in the coming years
  • Extensibility and flexibility: These features are crucial and they are aimed at using one platform over a long period of time by constantly improving it
  • Costs: Costs should be as low as necessary


A Modular FPGA Control Platform

For these reasons, TTZ-EMO developed a modular FPGA control platform within the past two years to eliminate these shortcomings. The system itself is divided into several plug-in cards, which are connected to each other via a backplane, all together mounted into a standard 19-inch rack. The core system consists of an FPGA card distributing more than 250 IOs to the backplane via one single high-density connector. They form an interface for extension cards, i.e. a modular expansion of the platform to implement various functions like data acquisition, communication or interfacing with an inverter. Figure 1 depicts a sample configuration without the 19-inch case for better presentation.


FPGA card with backplane and several extension cards

Figure 1. FPGA card with backplane and several extension cards. The 19″ case is left for better presentation.


Extension Cards

The link between the FPGA-card and any extension card is an individual point-to-point connection without bus protocol for minimum latency. The FPGA card itself comes up with several communication and storage capabilities such as dual Gigabit-Ethernet, 1 GB DDR3-SDRAM, SATA, MicroSD-Card and a dual port RAM interface. It incorporates an up-to-date Xilinx Artix-7 FPGA with approx. 215.000 logic cells and 740 DSP blocks, enough computation power even for extensive algorithms in the field of power electronics.

The backplane currently offers slots for up to ten extension cards, entirely sufficient and flexible for state of the art R&D applications. Nevertheless, for even more computational power, the backplane offers a slot for one additional FPGA (or other) card with then both FPGA-cards being able to communicate via four 6 Gb/s links.

As a starting point, we developed seven extension cards to satisfy our needs for current research projects. They contain the functions for getting connected to the gate drives of the power electronics (power stage), for reading analog measurement probes and converting internal FPGA signals to analog values to be displayed e.g. on an oscilloscope. In more detail, selected specifications for major extension cards are as follows:


Inverter Interface Cards

There are inverter interface cards for 3-phase 2-level and 3-level inverters and an H-bridge, the latter also being able to be used for 5-level inverters. Each card provides a true galvanic isolation to withstand 2.5 kV in case of an inverter fault. Gate drive signals are distributed via 15 V logic levels for high immunity against noise while switching frequencies beyond 100 kHz are easily possible. Most cards are equipped with a low-resolution ADC for measurements of inverter phase currents, DC-link voltages, and temperatures.


ADC Extension Card

The ADC extension card is equipped with four independent channels, each 14-bit resolution at a sampling rate of 40 MSPS. The voltage input range is ±1 V at an impedance of 50 Ohms. With an individual active or passive onboard matching network, the input channel can be adapted to the respective measurement sensor. Digital data are transferred to the FPGA over the backplane via high-speed serial LVDS data streams. Inside the FPGA the serial stream is converted back to parallel words for further processing.


DAC Extension Card

For monitoring and debugging internal controller signals a DAC extension card is available that represents the counterpart to the ADC extension card. It provides four channels, each 14 Bit at 40 MSPS. The full-scale output range is mapped to ±1 V by default.

Each extension card carries an EEPROM that is interfaced via a one wire connection to provide storage for manufacturing data like card type, serial number etc. This also enables individual card detection within the FPGA logic to avoid damage to the hardware.


Starting with a Control Algorithm

Before implementing a code into the FPGA, the time discrete model of the control algorithm is simulated together with continuous hardware models to get a whole system simulation result. Since the simulation uses a model identical to what is coded and implemented into the FPGA, we are able to analyze and improve the control algorithm solely by means of simulation. Also, fast model-based code generation, as available today, supports developing, testing and improving the final control algorithm. Such an approach of rapid prototyping may include state machines or particular user codes as well.

The modular design of the hardware, as well as the code, allows engineers to choose those software modules for needed IO-Cards which best fit their demands. For example, the user only needs to know which type of IO-Card is suitable for his needs. The respective handwritten high-performance code for IO-Cards is then packed into so-called IPCores. These custom building blocks fit in a graphical user interface (GUI) to build up the whole FPGA software simply by visual programming. This simple approach makes it easier for beginners to create complex logic circuits for FPGAs.


LabVIEW-Based Real-Time UI

Last but not least we completed the design workflow by integrating a highly customizable LabVIEW based real-time user interface for tuning, monitoring and logging the internal model parameters. For this purpose, an UDP-Core is installed into the FPGA to establish a connection based on a widely available interface: Gigabit-Ethernet. Making use of our appropriate design blocks for model-based programming it is getting a breeze to connect up to 62 signals in each direction with an accuracy of 32 bit. These real-time signals are transferred bidirectionally at a rate of 50 kHz between the FPGA and a PC. Figure 2 shows the whole toolchain involved in a test bench setup.


Toolchain for rapid prototyping with the proposed FPGA system

Figure 2. Toolchain for rapid prototyping with the proposed FPGA system.


Furthermore, a keep-alive mechanism ensures that user-defined safety-critical processes are shut down and put in a safe state on connection break. The modular LabVIEW-Dashboard offers several visualization and interaction elements including up to ten 4-channel software oscilloscopes with on-line FFT calculation and various trigger modes suitable for almost every need.

As a result, we are able to serve different R&D projects, each having its distinct requirements on a control platform. Model-based code generation is an essential ingredient for rapid prototyping of complex controllers in the field of power electronics (see Figure 3 and Figure 4). A versatile real-time Ethernet interface allows connection to various GUIs on a standard PC for the operation of the control platform.


FPGA System inside 19″ rack (top) used to control a test bench for wireless charging with SiC.

Figure 3. FPGA System inside 19″ rack (top) used to control a test bench for wireless charging with SiC.


FPGA System (back) integrated in a five-level three-phase inverter (front) test bench

Figure 4. FPGA System (back) integrated in a five-level three-phase inverter (front) test bench.


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