AI-Powered Architecture Unleashes Future Silicon IGBT and SiC ImprovementsMarch 16, 2020 by Bruce Renouard
This article discusses Pre-Switch's solution for the elimination of switching losses by incorporating AI into the Auxiliary Resonant Commutated Pole (ARCP) architecture.
Until recently, the power conversion industry’s progress in efficiency, size, weight, and cost have been principally driven by improvements in semiconductor transistors. To achieve these improvements, the engineering goals for new transistors were straight-forward: increase the stand-off voltage, reduce conduction and switching losses, and reduce costs.
Billions of dollars have been spent — and continue to be spent — chasing these same goals. Today’s seventh-generation IGBTs and MOSFETS and third-generation SiC MOSFETs and GaN FETs are vastly superior to previous generations of power devices. All of these devices are true marvels of human ingenuity.
While many different types of transistor improvements have benefited our industry, it has been the relentless reduction of transistor switching losses which has had the most impact. To reduce switching losses, the semiconductor industry focused on improving device transition speeds. The faster a device can transition between On and Off states, the smaller the overlapping current and voltage waveforms, which in turn reduces switching losses Etot (total turn-on and turn-off energy wasted across a switching cycle).
Reduced switching losses means designers can use higher switching frequencies for the same or lower loss budget. Higher switching frequencies have the follow-on benefit of reducing the amount of energy needing to be stored in the passive devices between switching cycles -thereby shrinking power converter size and costs. Reducing switching losses also reduces wasted energy and the size of the heatsink needed to dissipate the waste heat. The net results of reducing switching losses are further improvements in power converter efficiency, size, weight, and cost.
A Barrier to Further Progress
Unfortunately, many of today’s high-performance semiconductor transistor technologies are bumping into a physical barrier, limiting further switching frequencies gains and power conversion effectiveness. Faraday’s law of induction is expressed as V=L di/dt. This means that the total voltage across the power switch (the addition of the conduction voltage drop (VSAT or Id x RDS -depending on switch type) plus the transient voltage = Inductance (package parasitic and system parasitic inductance) multiplied by the Change in Current (through the device) divided by the Time duration of that change. In simple terms, what this means is that the faster a switch transitions between On and Off states, the higher the transient Voltage is generated across the device. The transition speed of today’s faster switches is enough such that the internal inductance causes the devices to experience an overshoot across the device. Hence an infinitely fast turn-on time would produce an infinite voltage across the device, which would blow up the device. Additionally, since some of the parasitic inductance is in the Emitter or Source connection, this can cause severe ringing in the gate drive circuit and cause a plethora of control problems.
Figure 1: Switching results of fast SiC Cascode with snubber circuit to limit overshoot.
Designers need to limit the transient voltage overshoot to protect transistors. In practice, many engineers buy ‘fast’ transistors only to slow them down by adding large gate drive resistors (or snubbers) -which negates some or most of the efficiency gains they desired in the first place. Additionally, the fast dV/dt of these devices degrades insulation and causes differential bearing currents in electric motors and limits the distance motors can be placed from their drives. In short, transistors with fast di/dt or dV/dt are problematic and require special attention.
Elimination of Switching Losses
So how does our power community continue to increase efficiency, while reducing size, weight, and cost despite the insurmountable Faraday challenge (V=L di/dt)? The answer, once again, is driven by human ingenuity — but this time it’s focused on power architectures.
The concept of soft-switching has been around since the '70s when Deepak Divan (now with Georgia Tech) introduced temporarily separating the current and voltage waveforms to eliminate switching losses. Since then, resonant architectures have been designed to reduce switching losses for many applications - but have been limited to markets with stable loads/inputs in either DC to DC or AC to DC converters. This neglects the giant DC to AC market which is needed for e-mobility, industrial motor drive, solar and wind applications.
DC to AC could not be soft-switched because of the challenge and complexity needed to vary the timing of a forced resonant circuit while generating a constant sine wave with varying load, input voltage, temperature, and device degradation. The result has been an absence of commercial soft-switching architectures for DC to AC applications until Pre-Switch (Figure 2).
Figure 2: Modified ARCP showing AI sensing and control. Blue shading represents RPG (resonant power gate) additional components added. Note: Pre-Switch uses low-cost IGBT’s to soft-switch IGBTs, SiC MOSFETs, and GaN FETs.
Pre-Switch, Inc. took an unconventional approach by incorporating AI into the previously developed ARCP (Auxiliary Resonant Commutated Pole) architecture (Figure 2). The ARCP (invented by R.W. De Doncker and J. P. Lyons at General Electric in 1990) was investigated by many leading power institutions only to be abandoned due to the inability to control for variabilities. Pre-Switch developed AI to sense many inputs and finely control the ARCP enabling full DC/AC and AC/ DC bi-directional soft-switching.
Pre-Switch’s AI dynamically senses and adjusts the timing of a lowcost auxiliary resonant circuit called the RPG (resonant power gate) shown in Figure 2. The result is a precisely timed resonant current (Figure 3) into a capacitor across the working transistor enabling zero voltage (ZVS) across the working switch. The AI processes multiple analog inputs without using an ADC IC or current sense resistors and adjusts the timing of auxiliary resonant switches on a cycle by cycle basis. The result is virtually perfect soft-switching that compensates for changes in load current, input voltage, device temperature, component degradation and manufacturing tolerances (Figures 4 and 5). Additionally, the AI adds very fast safety and protection features such as OVP, OCP and desaturation protection. The AI does not need to be trimmed in production and can be added to many other architectures.
Figure 3: Pre-Switched ARCP turn-On waveform of 1200V 35mOhm MOSFET (United SiC UJ3C120040K3s) at 800V and 40A. Resonant current (green), voltage (yellow), ARCP loss (red).
Figure 4: Pre-Switched turn-On wave form of 1200V 35mOhm MOSFET (United SiC UJ3C120040K3s) at 800V and 40A. Note lack of overlapping current (blue) and voltage (purple) wave forms resulting in virtually no switching losses (red).
Figure 5: Pre-Switched turn-Off wave form of 1200V 35mOhm MOSFET (United SiC UJ3C120040K3s) at 800V and 40A. Note the non-overlapping current (blue) and voltage (purple) wave forms and virtually no switching losses (red).
Pre-Switch enables multiple new design paradigms resulting from the elimination of efficiency-robbing switching losses and device overshoot. With no switching losses, the complete switching loss budget can be allocated to conduction losses – thereby reducing the size and cost of the transistors needed (Figure 6). Alternatively, the switching loss budget can be reallocated to let transistors switch at ultra-high switching frequencies -thereby reducing inverter output ripple and hence their system filter size and cost. Additionally, any combination of these new options can be used for system optimization and the architecture adjusts dV/dt to any value required at the system level.
Pre-Switch has enabled customers to build systems with switching frequencies 4X-5X faster than their hard-switched IGBT systems and 10-20X faster than their hard-switched SiC and GaN systems. In the case of a SiC-based EV inverter, increasing the Fsw from the ubiquitous 10kHz up to 100kHz or 300kHz creates a near-perfect sine wave without any output filter. The result is the elimination of unnecessary motor iron losses and increased motor efficiency at low torque and low RPM. Higher switching frequencies also enable higher RPM motors that are lighter and lower cost.
In a world without switching losses, the best optimization is achieved by looking at the WHOLE SYSTEM for efficiency and cost. As an example, many EV companies have separate inverter, motor, and battery teams. If Pre-Switch technology is siloed in the inverter team, they will likely want to eliminate their switching losses to save on their transistor and heat sink costs - all while producing a higher efficiency inverter (Figure 6 vertical axis). Who could fault them? But the real goal is ‘battery to wheel efficiency’, measured in EV range. In this case, the motor team should be asked how much more EV range could be achieved across the full drive profile if their motor was fed a pure sine wave from the inverter. To achieve a pure sine wave, design freedoms should be optimized with ultra-fast switching frequencies (Figure 6 horizontal axis) which significantly improves low torque efficiency, and hence increases EV range.
Figure 6: IGBT value propositions of using Pre-Switching in an IGBT system.
SiC Test Results Explained
The hard-switching and Pre-Switching comparisons in Table 1A were obtained by Double Pulse Tests (DPT) on Pre-Switch’s CleanWave200 Evaluation system (figure 7) using United Silicon Carbide’s UJ3C120040K3S in a 3 pin TO247 discrete package. To measure the hard-switched DPT data, all ARCP soft-switching components were removed from the same CleanWave board for the same devices. The measured hard-switched results were in excess of the manufacturers data sheet specifications so further effort was made to reduce the hard-switched results. In the process, it was discovered that the UJ3C series parts used in the CleanWave200 were optimized for soft-switching applications but not hard-switching applications. For transparency purposes, Pre-Switch added sections B and C to Table 1 showing measured gains compared to other devices based on their datasheet specifications.
Figure 7: CleanWave200 evaluation system (200kW inverter power block, 800Vdc, 99% efficiency at 100kHz).
Additionally, the ARCP losses shown in Table 1 are conservative. This is because Pre-Switch sized the ARCP components used in the CleanWave200 for the current capability of three switches in parallel per switch location and only one switch was used in the DPT. This means that the measured ARCP losses in Table 1 (which were measured on a single switch) are over a representative of the total losses and an engineer would expect to see in an optimized system.
|Device loss||Device loss||ARCP losses||Total losses|
Table 1a: CleanWave200 Double Pulse Test data: Measured hard-switched to Pre-Switched on the same device,
Savings vs data
|Datasheet Specs.||Device loss||ARCP losses||Total losses|
Table 1b: CleanWave200 Double Pulse Test data: Datasheet data compared to measured Pre-Switched
|Datasheet Specs||Device loss||ARCP losses||Total losses|
Table 1c: Datasheet data on a different device compared to Pre-Switch measured data.
How to Design with Pre-Switch Technology
Pre-Switch is focused on supporting applications requiring >350V and power ranges >50kW. While the technology scales to smaller power converters, the company is intentionally delaying these markets. Pre-Switch is selling the CleanWave200 evaluation system to allow customers to assess the cycle by cycle adaption of Pre-Switches AI-based soft-switching and explore the benefits of higher switching frequencies in their application. The CleanWave200 represents the power block of an inverter with a PWM interface. The system bi-directionally converts 800VDC to three-phase AC at power up to 200kW with an Fsw of 100kHz and 99% efficiency.
Now in its 4th year of business, Pre-Switch is also providing design services to customize the RPG (Resonant Power Gate) board needed to complement the company’s 3-phase soft-switching controller board called the Pre-Drive3. For customers with >100K units of the same design, Pre-Switch will bundle design services with the sale of its Pre-Flex IC.
The Future is Now
The power conversion world has never been more exciting — and the real power revolution is just starting. Electric cars, busses, tractors, planes, trains, boats, motorcycles, robotics, drones and many more are barely penetrating our lives. The revolution unleashed with PreSwitch’s AI-controlled architectures, capable of soft-switching DC/ AC and AC/DC, is delivering decades of future incremental transistor innovations - today. A world without switching losses changes everything. System-level benefits now extend past the lonely inverter subsystem. The pure sine wave inverter output offering EVs 5-12% more range is no longer “the future0". Second-order benefits from dramatically higher switching frequencies are now within reach. It’s time to increase motor pole counts, drive them with higher speed fundamentals, and increase their RPMs thereby increasing power density while shrinking size and cost. It’s time to shrink solar inverters, wind turbines, VFD, OBCs and fast DC chargers while eliminating their cooling fans.
Think about it. A world with no switching losses is finally here.
About the Author
Bruce Renouard is the CEO of Pre-Switch, Inc. and was the former SVP of Cree and Power Integrations. He is a world traveler, surfer, solar home geek, electric motorcycle enthusiast, land conservationist and dog-lover.
This article originally appeared in the Bodo's Power Systems Magazine.