Applied Power Electronics Conference and Exposition APEC 2019

APEC, the premier annual event in applied power electronics provides technical information of interest to everyone involved in the power electronics community

The 2019 Applied Power Electronics Conference and Exhibition (APEC) was held from March 17-March 22 at the Anaheim Convention Center, Anaheim, CA, USA.

 

 

The conference, which is jointly sponsored by the IEEE Power Electronics Society (PELS), the IEEE Industry Applications Society (IAS) and the Power Sources Manufacturers Association (PSMA) brings together professionals from all sectors of the power electronics industry for in-depth technical presentations and discussions that combine theory with practical applications.

Learning Opportunities for the Attendees

The conference provides numerous learning opportunities for the attendees. These include Professional Education Seminars, technical papers presented in both lecture and poster format, application-oriented industry sessions, an extensive exhibition accompanied by exhibitor seminars, and the popular “Rap Sessions” in a panel discussion format that allows open interactions between the audience and industry experts. As a result of this comprehensive program, APEC has become recognized as the premier event in the field of applied power electronics.

 

The APEC showroom floor.

 

Paper Presenters and Speakers

This year’s technical program consisted of over 500 papers covering all aspects of applied power electronics. The accepted papers were thoroughly peer-reviewed for both technical innovation and to ensure the highest technical quality.

Papers with broad appeal were scheduled for oral presentation during one of the forty technical sessions. Papers with a more specialized focus were presented in poster format at the dialog sessions. This allowed conference participants and presenters to discuss the work at a level of depth and detail not possible in a standard oral presentation.

The Dialog Session papers underwent the same rigorous peer-review process as the Technical Session papers and both appear in the conference proceedings. The APEC Industry Sessions run in parallel with the technical track and this year expanded to 23 separate sessions on a wide variety of topics. The industry sessions consist solely of invited presentations; speakers make an oral presentation only, without submission of a formal manuscript to the conference proceedings.

This enables presenters to cover current topics that would not otherwise be publicly presented at a professional conference. In addition, the conference featured a series of Exhibitor Seminars. The exhibitor seminars were a series of half-hour presentations highlighting new products and services and enabling more in-depth discussion than could be obtained by a visit to their booth.

The conference was preceded by two-day technical workshops on Saturday sponsored by PSMA.

The first of these, titled “Power Magnetics at High Frequency”, was aimed at designers, manufacturers, and fabricators of magnetic components and materials interested in achieving higher power densities, reduced aspect ratios, higher efficiencies, and improved thermal performance.

The second titled “The Impact of Wide bandgap Technologies on Application of Capacitors”, discussed technical options available for capacitor technologies to meet the challenges driven by the increased power densities and switching frequencies enabled by the wide bandgap semiconductor devices. All day Sunday and Monday morning prior to the opening of the conference APEC presented a series of eighteen Professional Education Seminars.

 

Professional Education Seminars

The Professional Education Seminars address the need for in-depth coverage of important and complex power electronics topics. Each seminar combined practical applications with theory designed to further educate both working professionals and students in power electronics and related fields. The Professional Education Seminars at APEC are three-and-one-half hours (including breaks) in length, range from broad to narrow in scope, and can vary from introductory to advanced in technical level. The 18 seminars covered a wide range of topics including wide bandgap devices, magnetics, converter and PCB design, thermal design, and digital control.

 

Networking and Professional Interactions

In addition to the extensive technical program, APEC 2019 offered numerous opportunities for networking and professional interactions. Key among these were the Monday evening opening reception in the exhibit hall and the Wednesday night social event featuring food, friendly-competition games, caricaturists and musical entertainment.The conference formally opened on Monday afternoon with five plenary presentations from industry leaders. The topics included the future of power electronics in robotic applications, an overview of university research in power electronics, flywheel energy storage at the utility scale, fuel cells for enabling zero emission transportation, and power electronics for space exploration.

 

SiC and GaN in the Future

Yole Development presented a thorough assessment of what the power electronics industry can expect from SiC and GaN in the next several years. They noted that the market share for wide bandgap devices is still small compared to the total power semiconductor market of $30B US. However, GaN was identified as having enormous potential in high performance and high frequency systems. While SiC is more mature, it has the potential for high growth in high density and high efficiency applications.

By 2023 they project the WBG market to grow to about $1.5B US, which is about 5% of the total market. Other direct evidence of the growing maturity of the wide bandgap materials was provided in a joint presentation by J. Cassady of Wolfspeed and S. Watts-Butler of Texas instruments.

They provided an update on GaN and SiC activities within the JEDEC standards committee. Their goals are to enable market growth, and accelerate industry-wide adoption of the WBG devices. This will be enabled by creating consistency across the supplier base through development of accepted industry standards. These include reliability verification and qualification procedures, test methodologies, and data sheet elements.

The JEDEC JC-70 committee began in October of 2017 with 23 member companies and has now grown to over 50 members worldwide including semiconductor manufacturers, users of wide bandgap power devices and test and measurement equipment suppliers. Interested companies are invited to join JEDEC to participate in this important standardization effort. Information is available on the JEDEC website at Join Jedec.

 

Wide Band Gap (WBG)

Similarly, a presentation from ABB discussed WBG device needs from an end user perspective. They identified three necessary drivers for WBG adoption. These included improved technology enabled by advanced packaging and device protection techniques, demonstrated reliability from both standardized testing and field experience, and reduced costs brought about by process improvements, increased wafer size and increased production volumes.

 

GaN Development

A number of presentations from Navitas Semiconductor highlighted their efforts to develop GaN Power ICs for the fast charger market. Their technology is based on lateral enhancement mode p-GaN gate technology with high breakdown field and high carrier mobility. The devices are manufactured in an established CMOS processing line to achieve high yield and high capacity and employ multilevel metallization. A monolithic half-bridge GaN power IC consisting of two 650V enhancement-mode GaN FETs, gate drivers, regulators level-shifters and GaN logic was demonstrated in a 2 MHz soft-switching application.

A number of presentations by Efficient Power Conversion Corporation (EPC) addressed the advantages of GaN-on-Si technology in a variety of applications especially high-step-down-ratio DC/DC converters. The GaN based converters were shown to offer reduced device losses compared to conventional solutions. They also presented a detailed study of GaN reliability for automotive applications. They noted that AEC Q101 qualification is an important milestone but additional application-based testing including hard/soft switching and in-circuit reliability testing is required to address customer concerns.

Several presentations from Infineon discussed advances in GaN and SiC and drew comparisons against conventional Si CoolMOS devices. They stressed the crucial importance of quality and reliability when considering the wide bandgap materials in customer designs.

 

Commercial Energy Storage System

GaN Systems, with the aid of several technology partners discussed GaN performance and reliability in datacenter, solar and wireless power production systems. The use of GaN devices in a commercial energy storage system was demonstrated to offer a 4% increase in energy efficiency, 8% cost savings in bill-of-materials cost and a 30% reduction in system size.

 

Power Supply Applications

The Transphorm Corp. presented a study of the use of GaN devices in systems that are currently in commercial production. They cited various power supply applications ranging from 500W to 3 kW, as well as industrial applications such as battery chargers and inverters.

 

Single-die Enhancement Mode Technology

GaNPower International Inc. presented the first discreet GaN devices rated at 1200V using single-die enhancement mode technology. The lateral devices, which are released and production ready, have an actual breakdown voltage greater than 1500V and are being rated at 1200V to guarantee sufficient safety margin. They noted that all previous GaN devices with BV higher than 600V were made with depletion mode devices in a cascode configuration with two or more chips co-packaged, resulting in compromised performance.

 

Fully Integrated GaN-on-Si Technology

Two presentations addressed novel technologies for GaN integration. A team from IBM and MIT presented a fully integrated GaN-on-Si technology for 48V power conversion. Their goal was to optimize conversion efficiency from 48V to <1V in point-of-load applications without an intermediate 12V bus. The process monolithically integrates GaN power switching devices with conventional silicon CMOS on a single die. Their novel technical approach is based on the selective epitaxial growth of GaN on etched areas of a silicon-on-insulator (SOI) starting wafer.

 

Monolithic GaN IC

SiN spacers are employed along the etched silicon sidewalls to serve as a diffusion barrier and also to prevent spurious epitaxial GaN growth from the etched sidewalls. The primary switching device is a depletion-mode GaN HEMT in a cascode configuration. An alternative approach was discussed by MinDCet NV. They developed a monolithic GaN integrated circuit using a SOI starting wafer. A buffer layer is first grown on the superficial silicon above the buried oxide. This is followed by the deposition of an epitaxial GaN layer in which p-GaN HEMTs are subsequently formed. Deep, oxide-filled trenches provide full dielectric isolation and allow for the use of local substrate contracts. Both 200V and 650V versions of the technology have been prototyped and tested.

 

Development on SiC

There was also considerable interest in SiC particularly in applications such as electric vehicles (EV), industrial motor drives and high-power inverters.

 

SiC MOSFETs

A presentation from ST Microelectronics discussed how SiC MOSFETs could enhance performance and reliability in an EV traction application. They emphasized that the Rds of SiC MOSFETs increases by only 30% as the operating temperature increases from room temperature to 150° C, presenting a significant advantage over Si. They demonstrated a 50% module package size reduction, an 80% cooling system size reduction, and a 1% increase in overall efficiency compared to a Si-IGBT solution in an 80 kW traction system.

 

SiC Inverter

Similarly, a presentation from John Deere Inc. discussed a 200 kW SiC inverter operating from a 1050V DC bus for heavy duty vehicles. They demonstrated a number of advantages compared to an earlier Si-IGBT approach including increased switching frequency (15 kHz vs 7 kHz), higher power density (25kW/L vs 17 kW/L), as well as enabling a smaller DC bus capacitor (400 uF vs 1500 uF).

 

SiC Boost Converter

Wolfspeed discussed a 60 kW SiC boost converter for use with solar power generation. They focused on both new packages designed to reduce switching loss through the use of a Kelvin connection to minimize dI/dt losses as well as board design techniques to optimize circuit board layout to reduce gate resistance and improve switching frequency. A four-channel boost inverter with 99.5% efficiency was demonstrated.

 

SiC-JFETs co-packaged with Silicon MOSFETs

United Silicon Carbide discussed techniques for designing with high-performance SiC-JFETs co-packaged with silicon MOSFETs in a cascode configuration with four-lead Kelvin packages. They noted that such combinations are compatible with a wide range of commercial gate drivers with no need for negative gate drive at turn-OFF.

They also stated that because of the very low output capacitance of the cascode, snubber circuits are desirable to control voltage overshoot and output ringing. However, the required snubber capacitance values are small, and the associated energy loss is only 1-5% of the total switching energy.

 

Power Overlay (POL) Packaging Technology

General Electric discussed their power overlay (POL) packaging technology with regard to SiC power modules. The POL technology is a differentiated packaging technology that combines flex, PCB, and wafer level processes to reduce size and improve performance. The technique enables direct pad interconnects using micro-vias to reduce parasitic resistance and inductance. They note that this system can support SiC applications at 1700V, currents in the range of hundreds of amps, and temperatures up to 175°C.

 

SiC Modules without External Diodes

Semikron presented a study of SiC modules without external diodes. They showed that combining optimal switching to reduce dead time with SiC MOSFET third quadrant operation using the inherent body diode can result in a 20% increase in power density compared to solutions using external diodes. The technique is applicable for three-phase AD/DC and DC/AC converters.

Next year’s APEC will be held from March 15-19, 2020 at the Ernest N. Morial Convention Center, New Orleans, LA, USA.

 

About the Author

Dr. Gary Dolny received his PhD. in Electrical Engineering from the University of Pittsburgh. He is currently a Technical Fellow in the Worldwide Technology Development Group at Fairchild Semiconductor.

 

This article originally appeared in the Bodo’s Power Systems magazine.