Using SiC MOSFETs in Totem-pole PFC Circuits

Note: Nico Fontana and David Meneses are co-authors of this Industry Article. 

AC-DC power supplies sold in Europe have been required to incorporate power factor correction (PFC), or more correctly to control ‘AC line harmonic current emissions’, since 2001, when EN61000-3-2 came into effect as part of the EU ‘EMC Directive’. Most equipment above 75 W rating is affected, although the limit is 25 W for lighting products [1].

The need arises because, without PFC, modern AC-DC power supplies would present a non-linear load to the utility supply with current taken in short bursts at the peak of the mains voltage. By Fourier expansion, the distorted current waveform can then be represented by a fundamental sine wave, which provides the real power, superimposed on harmonics which represent ‘reactive’ power. The current in these harmonics provides no useful load power but is still drawn from the supply, adding unnecessary losses in the distribution network. Power factor correction works to eliminate the harmonics by shaping the current to follow the nominally sinusoidal line voltage.

For very low power, ‘passive’ correction with a line frequency inductor is possible, but above a few tens of watts, this is too expensive, large, and heavy. The solution for higher power is to actively force the line current to follow the applied voltage shape by switching the current at high frequency and modulating the pulse width with an analog of the sinusoidal line voltage waveform. The switching circuit is mostly, but not necessarily, in the form of a boost converter where the depth of modulation of the pulse width is also controlled by feedback to produce a near-constant DC output voltage, set to be just higher than the peak of the line AC. A simple boost converter, Figure 1 (left) operates from only one supply polarity so a preceding bridge rectifier is needed.

High efficiency of power conversion is also increasingly vital to save energy costs and meet requirements such as the European ‘Ecodesign Directive’ 2019/1782 and the US DoE ‘Level VI’ limits. The toughest target is perhaps ‘Energy Star’ 80+ Titanium, mandating a minimum efficiency for computer power supplies of 96% at 230 VAC and 50% load. This target efficiency is end-to-end in the power supply and practically, a PFC stage must contribute less than half of the loss budget, or <2%. However, in the simple boost in Figure 1, the bridge rectifier alone could lose up to 2% making the circuit unsuitable.

 

Figure 1. Active PFC arrangements, left to right: traditional, dual boost, Totem Pole

 

Development of the boost PFC is the ‘dual’ arrangement, Figure 1 (center), which simply includes a separate converter for each mains polarity. Two-line rectifier diodes, or MOSFETs configured as rectifiers, are still required, however, along with the complexity of two converters with two inductors, so the circuit is still not ideal. A further improvement which is now becoming standard, is the ‘totem-pole PFC’ arrangement, Figure 1 (right). Here, Q6 and Q7 can each be configured as a switch or diode depending on the AC polarity, forming a single boost stage, with Q4 and Q5 steering the current as appropriate to the polarity. No separate bridge or line rectifiers are now needed and losses are limited to the conduction and switching contributions from the MOSFETs and from parasitic effects such as the reverse recovery of body diodes and charge/discharge of device capacitances. An added benefit of the technique is its inherent bi-directional capability.

Q4 and Q5 are not critical as they only switch at line frequency, 50/60 Hz, so dynamic losses are negligible and silicon MOSFETs can be chosen with low on-resistance for minimal conduction loss. Q6 and Q7 however switch at high frequency so dynamic losses must be considered.

 

PFC Operating Mode Affects Efficiency

A boost converter can operate in different conduction modes: continuous, boundary, and discontinuous (Figure 2). These refer to the inductor current and whether it goes to zero or not each switching cycle.

 

Figure 2. Boost converter operating modes

Discontinuous mode (DCM) can be ‘quasi-resonant’ where zero voltage switching is achieved and dynamic losses minimized, but peak currents are high, increasing conduction losses and core loss in the inductor. The mode is therefore only suitable for relatively low powers. Boundary mode (BCM) occurs when the inductor current is controlled to just touch zero each cycle and peak currents are somewhat lower than DCM, but the mode requires variable frequency operation which is not preferred. Continuous conduction mode (CCM) can be designed for arbitrarily lower ripple current and is suitable for high power. There is a downside though: considering the main's polarity where Q7 operates as the main switch and Q6 as the synchronous rectifier, Q7 switches on with high voltage at the drain, so-called ‘hard-switching’, with transiently high power dissipation. Q6 can turn on at zero voltage, because after Q7 turns off, Q6 body diode conducts by commutation, discharging Q6 COSS. However, after Q6 turn-off, its body diode conducts again storing charge QRR and when Q7 subsequently conducts, this is recovered with transient dissipation.

For the other polarity of mains waveform, the functions of Q6 and Q7 reverse. The relatively high values for Q_RR and C_OSS/Q_OSS for silicon MOSFETs, even superjunction types, consequently produce excessive dissipation. Variation in these parameters is also a problem, with C_OSS changing by a factor of typically 10,000 with drain voltage swing each cycle and also strongly with temperature. C_OSS of Q6 must be completely discharged for zero voltage switching so the dead-time between switch on-states must be long enough for this to occur, allowing for the wide variation in C_OSS. However, excessive dead-time leads to conduction losses in Q6 body diode which drops significant voltage. The net effect of the losses described means that Si MOSFETs are unviable for high power/performance totem pole PFC applications.

 

CoolSiC™ MOSFETs Have Critical Parameters that Enable High Efficiency

The development of wide band-gap semiconductors, particularly SiC MOSFETs, has practically solved the body diode reverse recovery problem with inherently better material characteristics and the smaller physical size of the pn junction for a given Rdson. The effect is shown in Figure 3 for 650V, 90 milliohm class devices, with a 88% reduction in QRR seen in SiC compared with CoolMOSTM. Importantly, the variation in QRR with temperature is also much less in SiC body diodes than with Si devices.

 

Figure 3. SiC reverse recovery is much less than Si. Image courtesy of Infineon

Similarly, the absolute value of COSS for a SiC device is lower and its variation with drain supply voltage far less, perhaps by three orders of magnitude. These factors together mean that not only is the recovered charge QRR and QOSS and consequent dissipation much lower in SiC, but dead time can be safely reduced for even better efficiency.

 

Practical Results

Infineon has demonstrated the totem-pole PFC topology using their proprietary 650 V CoolSiC™ MOSFETs in a 3.3kW reference design (EVAL_3K3W_TP_PFC_SIC)[2] (Figure 4), which achieves a power density of 73 W/in3 (4.7 W/cm3) at a peak efficiency of 99.1% at 230 VAC input and 400 VDC output. (Figure 5). CoolSiC™ MOSFETs in TO-247 four-pin packages type IMZA65R048M1, rated at 650 V, 64 milliohms are used for the high-frequency switches and IPW60R017C7 CoolMOSTM Si superjunction MOSFETs rated at 600 V 17 milliohms used for the low-frequency switches. The design is fully bi-directional and in inverter mode, achieves a peak efficiency of over 98.8% for 230 VAC mains and 400 VDC supply. The efficiency figures quoted include losses in the included EMI suppression and inrush limiting components which are necessary for a practical design.

 

Figure 4. A bi-directional AC-DC/DC-AC converter using SiC MOSFET technology from Infineon.

 

Figure 5. Measured variation of efficiency with load of Infineon totem pole PFC demonstrator at 230VAC input.

Control of a totem-pole PFC stage is complex, especially when bi-directional, so a digital technique is advantageous. This is implemented with the Infineon XMC 1404 microcontroller. Power factor of the resulting design is better than 0.95 from 20% load, with a current total harmonic distortion (THD) figure of less than 10% from 20% load, meeting the requirements of EN 61000-3-2. As a demonstrator, the unit is designed for high-line operation only, but the techniques can be applied to achieve full universal input 88-264 VAC if wished.

 

Conclusion

Use of Infineon’s CoolSiC™ MOSFETs has broken the barrier of less than 1% losses in a high-power totem-pole PFC stage making the technique an indispensable part of the overall goal of less than 4% losses, end to end, in a ‘Titanium’ standard AC-DC power supply. Enablers are the low reverse recovery charge and low, stable output capacitance of SiC MOSFETs and their inherent high-temperature rating, low gate charge, low specific on-resistance and robustness are also benefits. The result is not only compliance with efficiency targets but a small, lightweight and low-cost solution that contributes to energy savings for less environmental impact.

 

Infineon has a broad portfolio of SiC-based solutions. CoolSiC™ devices are available in discrete and module formats in ratings from 650 V to 1700 V and with on-resistance down to 2 milliohms. The offering is further complemented by a range of matching EiceDRIVERTM gate drivers for ease-of-use and enhanced performance. The non-isolated and isolated variants for low- and high-side drives, using Infineon’s coreless transformer technology, are a perfect fit for the CoolSiC™ product family. For a complete solution, current sensing ICs and microcontrollers for digital control are also available.

To learn more about Infineon’s SiC-based solutions, please visit Infineon's website. 

 

Authors

Nico Fontana was born in Gemona del Friuli (UD), Italy, in 1990. He received the M.Sc. degree in Electronics Engineering in 2016 from the University of Udine (Italy). In 2016 he joined Infineon Technologies Austria AG, where he is currently working as a Product Definition Engineer for High Voltage MOSFETs.

David Meneses was born in Madrid, Spain, in 1982. He received the M.Sc. degree in Electrical Engineering (2009) and Ph.D. in Power Electronics (2016) from Universidad Politecnica de Madrid (Spain). In 2014 he joined Infineon Technologies Austria AG, where he is currently working as Senior Staff Application Engineer in AC-DC applications.

 

References

[1] https://www.epsma.org/wp-content/uploads/2021/01/PFC-Guide_03032018-3-final-7-7.pdf

[2] 3300 W CCM bi-directional totem pole with 650 V CoolSiC™ and XMC™ Infineon application note AN_1911_PL52_1912_141352

https://www.infineon.com/cms/en/product/evaluation-boards/eval_3k3w_tp_pfc_sic/