Tips for Using LTspice for Power Circuit Design

LTspice is a powerful, straightforward, and freeware SPICE simulation tool that is widely used in the industry.

Typical use cases of LTspice are listed for power circuit design and practical tips for LTspice usage are provided. This explanation of the simulator can help engineers avoid an abundance of manual calculations and reduce development time and costs.

 

Power Circuit Design Flow

The power circuit design is often a tedious task that involves the following steps:

1. Write down the key specifications (voltage range, temperature range, maximum currents, protection circuits, varying load conditions, maximum size, etc).
2. Select the base architecture of the system or circuit.
3. Predict the required parameters for each part of the system.
4. Find the components that best suit the selected architecture.
5. Design the schematic.
6. Predict the working conditions of the designed circuit and check if they meet the key specifications.
7. Build a prototype.
8. Test the prototype and confirm that predicted parameters have been achieved and key specifications have been met.
9. If key specifications are not met, make the required corrections (restarting from step four).

 

Steps four through eight can be particularly time-consuming. Sometimes the project doesn’t go as expected, the development time is extended, and the designer may be pressured to reach project completion as soon as possible.

This undesirable situation is generated when the results from testing the prototype (step eight) are different from those predicted during step six. This often occurs because the calculation of the exact performance based on the datasheet parameters is not possible.

This is why modern analog circuit design (and power circuit design) makes extensive use of simulation tools that can predict system behavior based on interconnected models of components, power sources, noise sources, etc.. These tools can produce results that are very close to the results observed with the prototype. 

LTspice is a powerful and widely used SPICE simulation application. It is provided free of charge by Analog Devices (originally by Linear Technology).

 

Note: To download the simulation files provided in this article, the reader must have LTSpice installed.

 

Figure 1. 

LTspice can be downloaded for free from here.

Sample simulation files can be downloaded from simulation tips presented later in this article and at the end of this article.

Why Use LTspice for Power Circuit Design?

From single component simulation to full system simulation, the flexibility of LTspice makes it possible to use it for a wide variety of simulations.

 

For power circuits design, LTspice can help to:

• Speed-up Design and Verification: In seconds or minutes it is possible to simulate the circuit avoiding tons of manual calculations, so the trial and error process can be iterated quickly until the desired result is reached. 

• Compare Components: Changing a component and launching a new simulation is a simple task, while doing the same on a real prototype takes some time. Choosing the right component through simulation can provide a great benefit.

• Check the Circuit Without Risking Damage: Damage can occur when a power circuit is being tested, and repairs may be quite time-consuming. Simulating the circuit before the prototype test can highlight problems before anything is damaged. 

• Ease of Measurements: Putting voltage or current probes in the circuit simulation and viewing the waveforms is easy and immediate while doing the same in a real-world circuit is not.

• Simulate Ideal Conditions: The differing results between a theoretical idea and the real-world implementation can be confusing. With the LTSpice simulator it is possible to verify the circuit using ideal components (i.e. ideal diodes, loss-free inductors, etc) and check how it works in ideal conditions. 

The above list could be extended because there are so many reasons for making use of a simulation tool like LTspice.

 

Now we’ll discuss practical tips for using LTspice for power circuits design.

 

Tip 1. How to Generate an Efficiency Report

Using the time domain analysis (.TRAN directive), for single-input/single-output circuits it can automatically generate an efficiency report. This report comes in the form of a table that contains: input power, output power, efficiency calculation, currents, and power for each component of the circuit.

After the start-up transient simulation, the parameters are calculated once the circuit reaches a steady-state condition. 

 

Figure 2.

 

Here are the steps to generate an efficiency report:

1. Draw the schematic including a single voltage source (which is assumed to be the input) and a load called Rload (which is assumed to be the load).
2. Right-click on the ".TRAN" directive and select “Stop simulating if a steady state is detected.” The “steady” parameter appears in the ".TRAN" directive.
3. Run the simulation.
4. From the menu bar click on View > Efficiency Report > Show in Schematic. The report will appear in the schematic.

Download a sample efficiency report simulation file from this simulation file folder and run it with LTspice.

 

Tip 2.  How to Simulate a Varying Load

Power circuits are usually subjected to varying loads, so it is important to check the circuit for different load conditions.

In LTspice this is done by using the ".STEP" directive, which will automatically re-launch the simulation while changing each time the value of a global variable. If this variable is associated with the load current, the simulation is repeated for different load values.

 

Figure 3.

 

Here the steps to simulate the varying load in the circuit above:

1. Put a current source as a load (I1) and set its value to {Iload}. The value of the current is a global variable that can change, instead of a fixed numerical value.
2. Add the ".STEP" directive as shown in Figure 3. It will make the simulator repeat the simulation while changing the variable load each time from 0.25 to 1 with steps of 0.25. In other words, the simulation will be performed with output loads of 0.25A, 0.5A, 0.75A, 1A.
3. Run the simulation. 
4. Put the voltage probe at one node (i.e. the output voltage). The plot pane will show the voltage waveforms with different colors for each simulation step, which in this case means for each load value.

Download a sample varying load simulation file from this simulation file folder and run it with LTspice.

 

 

Tip 3. How to Automatically Calculate Parameters

As you are simulating your circuit, you may need to calculate important parameters such as input power or output power. LTspice can save you some time by performing these calculations automatically.  

This feature can be particularly useful when multiple simulation steps are performed because the simulator will automatically calculate the requested parameters for each simulation step.

 

Figure 4. 

 

In the simulation above we added three ".MEAS" directives to automatically calculate:

• pin: input power obtained as products of input voltage and current;
• pout: output power obtained as products of output voltage and current;
• eff: efficiency calculated by definition as pout/pin ratio.

At the end of the simulation run, press CTRL+L to open the simulation log, which contains the calculated parameters, as shown in Figure 5. 

 

Figure 5. 

 

In the log, LTspice calculated the three parameters for each of the simulation steps. This technique can save a great deal of time for designers. 

 

Note that on Step 3, with load current 1A, the calculated values are the same as those already provided in the efficiency report generated in Tip 1.

Download here a sample simulation file with parameter calculation from this simulation file folder and run it with LTspice.

 

 

 

Tip 4. Plot Calculated Parameters for Each Simulation Run 

After an automatic calculation of the parameters, it can be useful to plot them to check how they change with each simulation step. A typical use of this feature is to plot the switching converter’s simulated efficiency for different load values.

 

Figure 6. 

 

How to generate the efficiency vs load current plot using the simulation and results from Tip 4. 

• Right-click in the error log where the calculated data are present.
• Select “Plot .step’ed .meas data”, a blank plot will open.
• Right-click on the blank plot and select “Add Trace” (or use CTRL+A).
• Select eff as parameter, the plot shown above will be generated.