32-bit Secure Microcontroller features Large Memory

STMicroelectronics has introduced the first member of the third generation of its ST33 series of secure microcontrollers based on the 32-bit ARM® SecurCore® SC300™ processor. The ST33J2M0 raises the bar in secure microcontrollers by providing the industry's largest (2MByte) Flash program memory, nearly doubling the memory available in a secure microcontroller. Manufactured in ST's 40nm process technology for cost efficiency, the secure microcontroller claims the highest performance and integrated crypto-accelerators that together with the industry's fastest clock speed in a secure micro, enable the highest performance for fast application execution. It also features a new hardware architecture with strong and multiple fault-protection mechanisms covering the CPU, memories, and buses to facilitate the development of highly secure software.

The latest ST33 family addresses the growing need for secure applications including embedded Secure Element (eSE), SWP (Single Wire Protocol) SIMs for NFC applications, and embedded UICC (Universal Integrated Circuit Card). These features are critical to protect transactions in areas as diverse as payment applications, the Internet of Things (IoT) and wearable consumer devices, to Machine-to-Machine communications in "Industry 4.0" factory automation as well as V2X and in-car communication applications.

"ST’s third-generation secure microcontroller is a highly versatile platform designed for multiple secure applications targeting a broad number of electronics devices," said Marie-France Florentin, Group Vice President, General Manager, Secure Microcontroller Division, STMicroelectronics. “The combination of unmatched performance, the industry’s largest memory capacity, and the highest security makes the ST33J2M0 an ideal solution to support a wide variety of sensitive applications, including those in banking, transport, authentication, biometry, M2M, automotive and more—all from a single device.”

The ST33J2M0 features multiple hardware accelerators for advanced cryptographic functions. The EDES peripheral provides a secure DES (Data Encryption Standard) algorithm implementation, while the NESCRYPT crypto-processor efficiently supports the public key algorithm. The AES peripheral ensures secure and fast AES algorithm implementation. Samples of the ST33J2M0 are available as wafers or housed in VQFN and WLCSP packages.